Raimund Ubar

Raimund Ubar is a professor of computer engineering at Tallinn Technical University and the head of Centre of Excellence for Integrated Electronic Systems and Biomedical Engineering in Estonia. R. Ubar received his PhD degree in 1971 at the Bauman Technical University in Moscow. His main research interests include computer science, electronics design, digital test, diagnostics and fault-tolerance. He has published more than 250 papers and three books, lectured as a visiting professor in more than 25 universities in about 10 countries, and served as a General Chairman for 10th European Test Conference, NORCHIP, BEC, EWDTC. He is a member of Estonian Academy of Sciences, Golden Core member of IEEE Computer Society and honorary professor of National University of Radioelectronics Charkiv (Ukraine). He was a chairman of Estonian Science Foundation, and a member of the Academic Advisory Board of the Estonian President.

Publications

Diagnostic Modeling of Digital Systems with Multi-Level Decision Diagrams
Raimund Ubar, Jaan Raik, Artur Jutman, Maksim Jenihhin. © 2013. 27 pages.
In order to cope with the complexity of today’s digital systems in diagnostic modeling, hierarchical multi-level approaches should be used. In this chapter, the...
Design and Test Technology for Dependable Systems-on-Chip
Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus. © 2011. 578 pages.
Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear...
Diagnostic Modeling of Digital Systems with Multi-Level Decision Diagrams
Raimund Ubar, Jaan Raik, Artur Jutman, Maksim Jenihhin. © 2011. 27 pages.
In order to cope with the complexity of today’s digital systems in diagnostic modeling, hierarchical multi-level approaches should be used. In this chapter, the...
High-Speed Logic Level Fault Simulation
Raimund Ubar, Sergei Devadze. © 2011. 28 pages.
In the first part of the chapter, an introduction to the problem of logic level fault simulation is given together with the overview of existing fault simulation...