Jaan Raik

Jaan Raik received his M.Sc. and Ph.D. degrees in Computer Engineering from Tallinn University of Technology (TUT) in 1997 and in 2001, respectively. Since 2002 he holds a position of senior research fellow at TUT. He is a member of IEEE Computer Society, a Steering Committee member of European Dependable Computing Conference and Programme Committee member for many leading conferences (DATE, ETS, DDECS, etc.). Dr. Raik has co-authored more than 100 scientific publications. In 2004, he was awarded the national Young Scientist Award. In 2005, he served as the Organisation Chair of the IEEE European Test Symposium. He has carried out research work at several foreign institutes including Darmstadt University of Technology, INPG Grenoble, Nara Institute of Science and Technology (Japan), Fraunhofer Institute of Integrated Circuits (Dresden), University of Stuttgart and University of Verona. His main research interests include high-level test generation, fault tolerant design and verification. Dr. Raik was the local project lead for the VERTIGO FP6 STREP project on verification and is the coordinator of the DIAMOND FP7 STREP project.

Publications

Diagnostic Modeling of Digital Systems with Multi-Level Decision Diagrams
Raimund Ubar, Jaan Raik, Artur Jutman, Maksim Jenihhin. © 2013. 27 pages.
In order to cope with the complexity of today’s digital systems in diagnostic modeling, hierarchical multi-level approaches should be used. In this chapter, the possibilities of...
Design and Test Technology for Dependable Systems-on-Chip
Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus. © 2011. 578 pages.
Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear application can have...
Diagnostic Modeling of Digital Systems with Multi-Level Decision Diagrams
Raimund Ubar, Jaan Raik, Artur Jutman, Maksim Jenihhin. © 2011. 27 pages.
In order to cope with the complexity of today’s digital systems in diagnostic modeling, hierarchical multi-level approaches should be used. In this chapter, the possibilities of...
High-Level Decision Diagram Simulation for Diagnosis and Soft-Error Analysis
Jaan Raik, Urmas Repinski, Maksim Jenihhin, Anton Chepurov. © 2011. 16 pages.
This Chapter addresses the above-mentioned challenges by presenting a holistic diagnosis approach for design error location and malicious fault list generation for soft errors....
Sequential Test Set Compaction in LFSR Reseeding
Artur Jutman, Igor Aleksejev, Jaan Raik. © 2011. 18 pages.
This chapter further details the topic of embedded self-test directing the reader towards the aspects of embedded test generation and test sequence optimization. The authors will...