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TopIntroduction
The MICS band is an ultra-low power, unlicensed mobile radio service for implanted medical device. Ten 300 KHz channels are allocated at 402-405 MHz frequency band (“FCC Rules and Regulations,” 2002). Implanted wireless device has a requirement of high reliability and ultra-low power consumption. Recent CMOS technology has enabled the design of reliable, low power and cost effective wireless transceiver. This demodulator is designed on 65nm technology under 1 V supply. It intends to be used for the epi-retinal prosthesis (Bionic Eye) to demodulate data for a 32x32 electrode array. In order to support these 1024 electrodes, a data rate more than 300 Kbps is required to make fully functional. Achieving high date rate and low power consumption from this limited 300 KHz bandwidth are challenges in the design of such system. So far, amplitude shift keying (ASK) and binary shift keying (BFSK) have been widely used in biomedical implants (Ghovanloo, Beach, Wise, & Najafi, 2002; Ghovanloo & Najafi, 2003). However, these two methods are not bandwidth efficient. This paper presents a demodulator that can work for both continuous phase BFSK and GFSK modulation schemes. Using GFSK, a data rate up to 400 Kbit/s is achieved within the given 300 KHz bandwidth. This demodulator is also immune to a frequency offset up to 4 MHz. A BER of 10-3 is obtained at SNR of 15.2 dB at the input.
Figure 1. Block diagram of receiver with the proposed GFSK demodulator
TopDemodulator Architecture
The Architecture of the RF receiver is shown in Figure 1. The RF frequency is down converted from MICS band, 402-405MHz to around 5 MHz. A channel-select filter is used to reject the image and select the desired channel. Then the limiter amplifies the IF signal to rail-to-rail swing. Block diagram of proposed GFSK demodulator is shown in the dashed box of the figure. It consists of four blocks: delay line, delay flip-flop (DFF), gm-c low pass filter, and decision-making circuit. The delay element delays the IF input by approximate half the bit period. Then the DFF uses the delayed signal as the clock to sample the original signal. So the frequency information of GFSK signal is mapped into the density and width of the pulse train. After that, the low-pass filter converts the frequency information into voltage level difference. The voltage level after low-pass filter (LPF) may experience variation, as it can be affected by the frequency offset, pulse width variation, and process variation. The decision-making circuit is at the final stage to make a decision on the specific input.