Analysis of Turbo Code Behavior with Extrinsic Information Transfer Charts in High-Speed Wireless Data Services

Analysis of Turbo Code Behavior with Extrinsic Information Transfer Charts in High-Speed Wireless Data Services

Izabella Lokshina (MMI, SUNY at Oneonta, Oneonta, NY, USA) and Hua Zhong (MMI, SUNY at Oneonta, Oneonta, NY, USA)
DOI: 10.4018/IJITN.2017100104
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Abstract

This paper examines turbo codes that are currently introduced in many international standards and implemented in numerous advanced communication systems, and evaluates the process of extrinsic information transfer (EXIT). The convergence properties of the iterative decoding process, associated with a given turbo-coding scheme, are estimated using the analysis technique based on so-called extrinsic information transfer (EXIT) charts. This approach provides a possibility to predict the bit-error rate (BER) of a turbo code system with only the extrinsic information transfer chart. It is shown that extrinsic information transfer charts are powerful tools to analyze and optimize the convergence behavior of iterative systems utilizing the turbo principle, i.e., systems exchanging and refining extrinsic information. The idea is to consider the associated soft-input soft-output (SISO) stages as information processors, which map input a priori log likelihood ratios (LLRs) onto output extrinsic LLRs, the information content being obviously assumed to increase from input to output, and introduce them to the design of turbo systems without the reliance on extensive simulation. Compared with the other methods for generating extrinsic information transfer functions, the suggested approach provides insight into the iterative behavior of linear turbo systems with substantial reduction in numerical complexity.
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2. The Process Of Extrinsic Information Transfer In High-Speed Wireless Data Services

The process of extrinsic information transfer in high-speed wireless data services can be described with analysis of iterative turbo decoder.

Figure 1.

Block diagram of turbo decoder with two constituent decoders

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