Collective Relocation for Associative Distributed Collections of Objects

Collective Relocation for Associative Distributed Collections of Objects

Daisuke Fujishima, Tomio Kamada
Copyright: © 2017 |Pages: 15
DOI: 10.4018/IJSI.2017040104
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Abstract

The field of parallel computing has experienced an increase in the number of computing nodes, allowing broader applications, including computations that have irregular features. Some parallel programming languages handle object data structures and offer marshaling/unmarshaling mechanisms to transpose them. To manage data elements across computing nodes, some research on distributed collections has been conducted. This study proposes a distributed collection library that can handle multiple collections of object elements and change their distributions while maintaining associativity between their elements. This library is implemented on an object-oriented parallel programming language, X10. The authors assume pairs of associative collections such as vehicles and streets in a traffic simulation. When many vehicles are concentrated on streets assigned to certain computing nodes, some of these streets should be moved to other nodes. The authors' library assists the programmer in easily distributing the associative collections over the computing nodes and collectively relocating elements while maintaining the data sharing relationship among associative elements. The programmer can describe the associativity between objects by using both declarative and procedural methods. They show a preliminary performance evaluation of their library on a Linux cluster and the K computer.
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2. Memory Model Of X10

X10 is a parallel programming language developed by IBM Research and adopts the PGAS model. Figure 1 illustrates the memory model of X10. The address space is partitioned using places, in which each object belongs to a specific place. Each place represents a shared-memory multiprocessor. An activity represents a sequential computation. Each place can run one or more activities.

Figure 1.

Memory Model of X10

IJSI.2017040104.f01

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