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Top1. Introduction
Thanks to the recent advance of microfluidic technology, digital microfluidic biochips (DMFBs) have been replacing conventional laboratory experiments in a number of biomedical applications including drug discovery, high throughput DNA sequencing, and environmental toxicity monitoring. By manipulating discrete picoliter biochemical droplets, this kind of biochips offers a number of advantages over traditional procedures such as high sensitivity, high throughput, low power consumption, less human intervention, fast and precise execution (Ho & Chakrabarty, 2011; Su, Chakrabarty, & Fair, 2006).
A typical digital microfluidic biochip consists of a two-dimensional electrode array, peripheral devices such as input/output ports, detectors, etc., as shown in Figure 1. By controlling voltage values of on-chip electrodes, droplets can be moved on the electrode array due to the principle of the electrowetting-on-dielectric (Pollack, Shenderov & Fair, 2002).
Figure 1. A schematic view of a digital microfluidic biochip
A traditional application-specific biochip can be used to perform only one single biochemical application. Several attempts have been made in the research of high-level synthesis for application-specific biochips (Alistar et al., 2010; Alistar, Pop, & Madsen, 2013; Su & Chakrabarty, 2004; Su & Chakrabarty, 2008; Xu, Chakrabarty, & Su, 2008). Such an application-specific biochip cannot be re-programmed in order to execute different applications. This not only limits the general applicability of the chip, but also increases the cost of production significantly. To deal with such issues, a programmable architecture of DMFBs, which is based on the concept of a traditional field-programmable gate array (FPGA), is proposed in (Grissom & Brisk, 2012). Such a programmable DMFB allows users to reconfigure the chip to execute different applications, and even dynamically modify the synthesis during the execution. Basically, the design in (Grissom & Brisk, 2012) divides the chip into several modules, which behave as similar to look-up tables (LUTs) in an FPGA. However, at each time step, a module can execute only one operation, and thus the completion time of the applications mapped to such a chip may be unnecessarily long. Moreover, the scheduling method proposed in (Grissom & Brisk, 2012) is based on a simple list scheduling algorithm, and thus it further increases the completion time of applications.