Survey of Self-Adaptive NoCs with Energy-Efficiency and Dependability

Survey of Self-Adaptive NoCs with Energy-Efficiency and Dependability

Liang Guang, Ethiopia Nigussie, Juha Plosila, Jouni Isoaho, Hannu Tenhunen
DOI: 10.4018/jertcs.2012040101
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Abstract

The self-adaptive Network-on-Chip (NoC) is a promising communication architecture for massively parallel embedded systems. With constant technology scaling and the consequent stronger influence of process variations, the necessity of run-time monitoring and adaptive reconfiguration becomes widely acknowledged. This article presents a survey of existing techniques and methods, in particular for energy efficiency and dependability. The article firstly examines the motivation of self-adaptive computing in parallel embedded systems. A self-adaptive system model is abstracted, which is composed of goals, monitoring interface, and self-adaptation. Based on the model, the authors extensively survey previous works addressing adaptive NoCs with different monitoring techniques and reconfiguration methods, for power/energy optimization and dependability enhancement. Several design examples are elaborated which serve proper guiding purposes. The authors also identify important issues which are often overlooked or deserve more attention. The article provides review and insight for future design on this topic.
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Self-Adaptive Nocs

NoCs have been developing rapidly in recent years. Most of them share a similar basic architecture (Figure 1), which is composed of processing elements, memory, routers, and interconnects between the routers. Data from a processing element is transmitted to its destination via routers and interconnects.

Figure 1.

Basic NoC architecture

jertcs.2012040101.f01

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