Abstract
In a system though the analog circuits occupy very less space but they require far more design time than the digital circuits. This is due to the fact that the number of performance measures of an analog circuit is more than those for digital circuits. Predicting and improving the performance, robustness and overall cost of such systems is a major concern in the process of automation. In the automation process, optimization of performances subjected to a verity of environmental constraints is a central task. In this chapter, efficient analog circuit sizing techniques and their optimization are surveyed.
TopAnalog Ic Design And Scope For Optimization
The Complexity of the Analog IC Design
The performance of analog integrated circuits is very much detrimental in the system performance. The performance specification contains requirements on the various performance metrics of the circuit. Here the performance metric are measures of properties that are used to characterize the behavior of an analog cell. For example an amplifier is characterized by gain, speed, power consumption, linearity and the like. All these performance metrics are very often competing in nature and hence present challenging tradeoffs in the design. This is represented as the analog design octagon which is illustrated in Figure1 (B. Razavi, 2010).
Key Terms in this Chapter
IDEA: Infeasibility Driven Evolusionary Algorithm.
PLL: Phase Locked Loop.
NSGA-II: Nondominated Sorting Genetic Algorithm-II.
VCO: Voltage Controlled Oscillator.
CSVCO: Current Starved Voltage Controlled Oscillator.
CMOS: Complementary Metal Oxide Semiconductor.
PCPVM: Process Corner Performance Variability Minimization.
GA: Genetic Algorithm.
FPGA: Field Programmable Gate Array.
PSO: Particle Swarm Optimization.
DVCO: Differential Voltage Controlled Oscillator.
ASIC: Application Specific Integrated Circuit.
RO: Ring Oscillator.
SPICE: Simulation Program for Integrated Circuit Emphasis.
FPAA: Field Programmable Analog Array.