This paper proposes new approaches for designing a bipolar DS acquisition system to reduce the harm of external factors on equipment, as well as fulfill system requirements at the veracity and reliability of the equipment to quickly connect. The design method chosen is ACPL-224 for chip of the interface about data acquisition on the FPGA device, including system principle, interface circuit logic, the method of data processing, and so forth. Now that this method has been applied, it has achieved good results, including extending the system’s adaptive range of external signal and enhancing the efficiency of the interface to quickly connect.
Top2. System Principle
The standard architecture of CPCI bus module is used in the digital signal acquisition system. Includes interface circuit, Schmidt shaping circuit, logic processing section, a bus interface part. External digital signal through the interface circuit acquisition, TTL signal is outputed, and then into the logic device EPM7256SRI208-10 after Schmidt shaping circuit, all data processing by its implementation. Bus bridge device using PLX's PCI9052 Compact PCI bus to local bus is provided to the system using. The system principle block diagram is shown in Figure 1.
Figure 1. Bipolar digital signal acquisition and processing system
Top3. Interface Circuit Design
According to the requirements of the system interface circuit 32 Road, to meet the needs of light vibration, the input voltage, bipolar input, access to “0” when an external signal end is suspended, the isolation voltage not less than 2KV.
ACPL-224 multi-channel half pitch photosensitive transistor is selected in the design of interface circuit, which has two oppositely connected with the light emitting diode can be adapted to the requirements of bipolar digital input signal, at the same time with photoelectric isolation characteristics, its isolation voltage is 3KV, each ACPL-224 device may receive a two group of external signal input. Adjust the current-limiting resistor values to the 2.47KΩ, to meet the requirements of the input voltage range. External signal output TTL level signal through the circuit such as the diagram A1, A2, and then into the FPGA processing by Schmidt plastic processing. Output terminal configured to pull high resistance to control the state when the external signal end is suspended. The interface circuit diagram is shown in Figure 2.
Figure 2. Interface circuit diagram
This interface circuit, not only can receive external bipolar digital signal input, to a unipolar signal can also access, without the need to distinguish the signal input end and a reference end, can effectively prevent external signal polarity changes or circuit damage when the port is connected against.