Design of Miniaturized Antenna for RFID Applications

Introduction

This Chapter is divided into two sections. First section is dedicated to microstrip antenna and miniaturization techniques, and second section presents four new miniature antennas designed on FR4 substrate. The first section describes the microstrip antenna with their analysis methods, and their feeding methods; at the end of this section, the miniaturization techniques and the state of the art of RFID antenna are presented. In the second section, four new miniature RFID antennas with different miniaturization techniques are designed and compared, in the band 915 MHz and 2.45 GHz.

Radio Frequency Identification (RFID) is the wireless use of electromagnetic field to identify tagged objects and is used in a variety of fields such as access control, transport, banks, health, and logistic. One major consideration for handheld and portable RFID system applications is the compact size (Finkenzeller, 2010).

RFID technology developments started as early as World War II, where airplanes used to be identified as “friend or foe” using this technology. The real explosion of passive RFID technology was at the end of the 1980s and was made possible by price of semiconductor technologies, current consumption of the circuitries, and the improved size. This enabled an acceptable RFID performance (communication distance) for passive systems under acceptable investment. The first generations of RFID tags were only commercially used in animal tracking in the United States with only a fixed identification code stored into the tag’s memory. There was mainly a one way communication with the tag communicating back its memory content when triggered by reader activation (Turcu, 2009).

Now RFID systems are widely used in applications as identification device, and there are also new applications with higher security and computation as payment card (Karmakar, 2010).

An RFID system is generally composed of a reader, tags, and data processing system (Kitsos & Zhang, 2008), as shown in Figure 1.

Figure 1.

RFID system architecture

The RFID data processing system stores related information such as product information, tracking logs and reader location. Since information retrieving and storing can be performed easily and speedily from RFID tags.

The Reader consists of a control unit, the transmitter module and the receiver module. The control unit contains the firmware and the hardware that control the reader activities such as communications with a host computer and the tag, as well as data processing. The transmitter generates the RF signal (data and power level) which is connected to the antenna resonance circuit. The receiver part receives the RF signal generated by the tag, demodulates and decodes the data, and sends the binary data to the control unit for further processing.

The reader has also an external interface, that are communication ports such as USB, RS232, Wireless network interfaces, and local area network (LAN) ports.

An example of reader block diagram, MFRC522 from NXP Semiconductors, is shown in the following figure:

Figure 2.

Block diagram of MFRC522 IC from NXP datasheet

In this example, the analog interface handles the modulation and demodulation of the RF signals. The contactless UART manages the protocol communication requirements. The FIFO buffer ensures fast and convenient data transfer to and from the host and the contactless UART and vice versa. Various host interfaces are implemented.

Tags are small chips with antenna; Data is stored in the chips and transmitted through the antenna. The tag chip contains three major parts: Analog RF Interface, Digital Controller, and EEPROM. The analog part provides power supply and demodulates data received from the reader for processing by the digital part. Furthermore, the modulation block of the analog part transmits data back to the reader.

The digital section includes the state machines, processes the protocol and handles communication with the EEPROM, which contains a unique ID and user data.