Embedded Networks in Mobile Devices

Embedded Networks in Mobile Devices

Sergey Balandin (Nokia Research Center, Finland) and Michel Gillet (Nokia Devices, Finland)
DOI: 10.4018/978-1-4666-0912-9.ch008
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Abstract

The concept of a mobile phone has recently transformed into a new concept of mobile multimedia devices capable of performing multiple complex tasks and integrating multiple functionalities. It has resulted in a significant increase of device integration costs and complicated deployment of new technologies. Device integrator companies favor modularity everywhere possible, which results in a new trend toward networked architectures for the mobile devices. However, comparing to the best-known embedded network solutions, e.g., SoC and NoC, these architectures have unique constraints and requirements, which also are significantly different from the wide area networks. The main constraints are power consumption and having a modular architecture to allow reuse of the components. Transition to the new architectures for mobile devices is a time consuming task that requires the analysis of many solutions applied in other contexts, especially for embedded protocols, QoS and resource management. This article reviews the state of the art in embedded networks research and the key assumptions, restrictions and limitations faced by designers of embedded networks architectures for mobile devices.
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Introduction

Mobile industry is in the mist of a radical transformation and shift of paradigm from monolithic device that provides certain application to a modular solution that addresses all user needs. Recent development of various technologies, for example, media and multimedia convergence, easy access to internet and its services, GPS and indoor positioning, smart spaces concept, advances in the low power CMOS technologies, memory integration and high bandwidth radios, are blurring more and more, from a user perspective, the differences between a laptop, a mobile handset, photo and video cameras and other devices, which only a few years back were seen as independent consumer electronics. At the same time, it is apparent from a technical perspective that the lines separating these areas are more blurred, which makes it difficult to predict with any accuracy how the mobile devices will look in 5-10 years and what will be their architecture.

The handset manufacturers now face a situation when there is essentially no standardized system interconnect or multi-purpose hardware interface, which could be the basis of a scalable and future proof architecture designed for ultra low power. It is important to note that having to deal with many different interfaces has a price—a need to use more complex chips with a large number of pins and additional functions for sharing pins make their usage mutually exclusive.

The monolithic nature of the currently available solutions is rooted in the trend to integrate as much as possible in one chip for increasing physical efficiency and reducing costs. But this approach has shown already its limits and lack of flexibility, as the complexity of monolithic chips steadily increase when combined with the fact that there is no multipurpose hardware interface resulting in a rigid architecture. When it takes 2 to 3 years for setting down the requirements and have the chip in a product, the user expectations have often changed significantly during that period. Moreover, one may need to wait several years to be able to have a new monolithic chip solution that fulfills the ever-changing needs.

An example of such mobile device is shown in Figure 1, where the main chip IC #0 includes many different functionalities and has only application specific hardware interfaces for camera, display, mass storage and various other components or ICs shown as App X to Z. When there is a need to add a new functionality, e.g., “Space travel”, there are essentially only 3 possibilities:

Figure 1.

One futuristic mobile device with a monolithic architecture

  • 1.

    Fit this new functionality at the last minute in the main chip IC #0, which is rarely a commercially viable solution for the chip manufacturer.

  • 2.

    Use a proprietary hardware interface, which is simpler for the chip manufacturer, but obviously not very interesting for a mobile device integrator.

  • 3.

    Try to hack a solution by re-using some existing hardware interfaces that were not designed for such purpose. This approach is rarely to succeed as in the long run the architectural disadvantages outnumber the short term benefits.

As a first step solution that simplifies the problem, dies stacking has been used in the mobile industry. However, there is no standard way to stack dies and no standard hardware interface for it. As a consequence, this step cannot answer alone the lack of architectural flexibility and sourcing flexibility.

If we look at laptops and netbooks, they have very strong standardized system interconnect and multipurpose hardware interfaces inherited from the PC world. These interconnects have often a bus or acyclic network topology as shown in Figure 2. Owing to the PC background, none of these interfaces was done for ultra low power. Their overall architecture of laptops or netbooks is essentially dictated by the system interconnect, which is the opposite situation found in mobile devices, since none is available. But it might be interesting to mention that the big players in PC industry are also heavily working on integrating more functionality into a single chip.

Figure 2.

An example of acyclic network topology

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