Fostering Analysis from Industrial Embedded Systems Modeling

Fostering Analysis from Industrial Embedded Systems Modeling

Michel Bourdellès (Thales Communications and Security, France), Shuai Li (Thales Communications and Security, France), Imran Quadri (Softeam, France), Etienne Brosse (Softeam, France), Andrey Sadovykh (Softeam, France), Emmanuel Gaudin (PragmaDev, France), Frédéric Mallet (INRIA, France), Arda Goknil (University of Luxembourg, Luxembourg), David George (Rapita Systems Ltd., UK) and Jari Kreku (VTT Technical Research Centre, Finland)
Copyright: © 2014 |Pages: 18
DOI: 10.4018/978-1-4666-6194-3.ch011
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Abstract

In most industrial embedded systems development projects, the software and the hardware development parts are separated, and the constraint requirements/capabilities are informally exchanged in the system development phase of the process. To prevent failures due to the violation of timing constraints, hardware components of the platform are typically over dimensioned for the capabilities needed. This increases both cost and power consumption. Performance analysis is not done sufficiently at early stages of the development process to optimize the system. This chapter presents results of the integration of tools and extra modeling to offer new performance analysis capabilities in the early stages of the development process. These results are based on trace generation from code instrumentation. A number of enhancements were made, spanning the system modeling stage down to the execution stage (based on an ARM dual core Cortex A9-based target board). Final results taken from a software-based radio case study (including the analysis and validation stages) are presented.
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Introduction

An industrial embedded systems development project comes within a global context including the respect of quality requirements, configuration management requirements and strong reporting and communications efforts with the system team, other parts of the system equipment development teams, and customers. A precise development process is defined to respect all these aspects. This process is, in the industrial domains concerned, driven by tests and based on system requirements validation.

Due to increases in system complexity, requirements validation has also become more complex. For example, the radio protocol domain faces new challenges and requirements due to increased execution platform component complexity. With the lack of proper tool support it is the responsibility of skilled architects to perform the complex and tedious task of validation. Consequently, the use of hardware platform modeling and enhanced performance verification is an identified issue in embedded system design environments.

The overall concept developed in this chapter is the ability to validate non-functional properties (such as performance) at an early stage in the development process. If an improvement in this area is achievable, a better fit of the software components to the execution platform is expected. To achieve this goal, new tools are introduced to existing ones. In this chapter, the project tools are defined, combined and integrated to create new design-space exploration techniques in the existing validation process. This allows the developer to better evaluate and test different allocation strategies of software components to the execution platform.

The addition of new tools to the development process must conform to the validation done by manual tests derived from requirements. It must not take too much extra development team effort in terms of time and the need for expertise.

The analysis must make the best use of existing validation environments. The methodology presented here will be based on traces already collected by test harnesses. These traces will be used to feed both functional and non-functional analysis tools. By reusing an existing validation environment, new tools and methods can be easily integrated into the current development process. As a complement, performance simulation is also studied.

We present in this chapter the results of the ARTEMIS collaborative project PRESTO (PRESTO, 2013). We illustrate how custom solutions from PRESTO (implemented in tools such as Modelio) were used to achieve trace generation and a verification flow that explores:

  • Modeling of a TDMA radio protocol.

  • Annotation of elements in a high level model for instrumented wrapper code generation.

  • Functional and non-functional properties specification.

  • Verification of properties based on traces coming from the generated instrumented code.

  • Performance simulation and evaluation with respect to execution on the target platform.

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Background

The PRESTO project aims to improve the software tools used in the recovery of information and extended specification data during the software development life cycle. The main information recovered from the software development process is a description of the software application as a set of interconnected components with their interface specified as input of the MARTE profile (OMG, 2013), or specific domain-specific languages supporting software/hardware allocation. Also recovered are test traces from “classical” software test integrations on functional behaviors.

Key Terms in this Chapter

SDL: Specification and Description Language is a language that has been developed to specify and describe the behavior of reactive and distributed systems.

AADL: That has its origins in the avionic domain, is a SAE standard for the development of real-time embedded systems. In AADL, the design can be represented in the forms of processes and threads which can interact via port connections, program calls and shared data access.

Modeling and Analysis of Real Time and Embedded Systems Profile: MARTE profile is the OMG profile for modeling complex embedded systems and their software/hardware characteristics along with allocation, performance and quantitative analysis aspects.

UML Profiles: A means of extending UML models with additional notations and concepts, termed as stereotypes.

EAST-ADL: An Architecture Description Language (ADL) for automotive embedded systems, designed to be utilized as a complement to AUTOSAR. Aspects covered by EAST-ADL include vehicle features, functions, requirements, variability, software components, hardware components and communication.

UML: Unified Modeling Language is a means of modeling complex systems. The UML is standardized by the OMG.

OTF: Open Trace Format is a trace monoid definition and representation for use with large-scale parallel platforms, developed by ParaTools and the Center for High Performance Computing, University of Dresden, Germany

TDMA: Time division multiple access is a channel access method for shared medium networks. It enables multiple users to share the same frequency channel. This is done by dividing the signal into different time slots.

Model-Driven Engineering: MDA is a software development methodology defined by the Object Management Group (OMG) in 2011. It allows designers to develop systems from a computation independent model to a platform dependent model, and incorporates technologies such as model transformations and model based repositories for artifact reuse.

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