Abstract
Field programmable gate arrays (FPGAs) are finding increasing number of applications in high integrity safety critical systems of aerospace and defence industry. Though FPGA design goes through various development processes, it is widely observed that the critical errors are observed in the final stages of development, thereby impacting time and cost. The risk of failure in complex embedded systems is overcome by using the independent verification and validation (IV&V) technique. Independent verification and validation (IV&V) of FPGA-based design is essential for evaluating the correctness, quality, and safety of the airborne embedded systems throughout the development life cycle and provides early detection and identification of risk elements. The process of IV&V and its planning needs to be initiated early in the development life cycle. This chapter describes the IV&V methodology for FPGA-based design during the development life cycle along with the certification process.
TopBackground
From references, (RTCA/DO-254, 2000) describes Design Assurance Guidance for Airborne Electronics Hardware for Line Replacement Units (LRUs), Circuit Board Assemblies, ASICs, PLDs, Integrated technology components such as hybrids and multichip modules and COTS components. (DoT FAA, 2015) focuses on the verification process and verification tools used for airborne electronic hardware (AEH) devices such as Field Programmable Gate Array (FPGAs), programmable logic devices (PLD) and application specific integrated circuits (ASICs).
Dagan (2011) Gives the practical use of FPGAs and IP in DO-254 compliant systems and defines COTS devices as components, integrated circuits, or subsystems that are developed by a supplier for multiple customers, whose design and configuration are controlled by the specification from the suppliers or industry, (RTCA DO-254 CAST-33, 2014) is a CAST paper for airborne COTS IP used in PLD and ASICs and is an acceptable means of compliance for Programmable Logic Devices (PLDs) and Application Specific Integrated Circuits (ASICs) implementing a third party Commercial Off-The-Shelf (COTS) Intellectual Properties (IP).
Paul and Anthony (2009) focuses on selecting the Ideal FPGA vendor for Military programs, Keithan (2008) is an advisory circular released by FAA and describes the design assurance for complex custom micro-coded components with hardware design assurance levels. Tasiran and Keutzer (2001) is a whitepaper focusing the verification process and verification tools for airborne electronic hardware (AEH). Liu and Jou (2001) describes the Advanced Verification Methods for Safety-Critical Airborne Electronic Hardware. (CYIENT, 2015) focuses on coverage metrics for Functional and Code coverage. Ref(j)elaborates on verifying the correctness of the initial Register Transfer Language(RTL) descriptions written in hardware description language(HDL) and the six different types of coverage metrics i.e. Statement, Block, decision, path, event and FSM. Discusses the key technical challenges involved in V&V of FPGA in the Aerospace and Defence Industry and highlights on how a global partnership can help optimize FPGA development by driving innovation, optimizing cost, and providing access to resources in emerging markets like India.
Key Terms in this Chapter
FPGA: Field programmable gate arrays consists of configurable logic blocks (CLB) that can be programmed, input output interface, and configurable interconnect that connects these blocks.
DO-254: Is a design assurance guideline for airborne electronics hardware that ensures the safe operation of complex electronics hardware to perform its intended function.
IV&V: Independent verification and validation is the set of verification and validation activities performed by an agency not under the control of the organizational unit that is developing the software.
VHDL: VHSIC, very high-speed integrated circuit hardware description language, is a programming language for hardware description language.