An Integrated Framework to Simulate SysML Models Using DEVS Simulators

An Integrated Framework to Simulate SysML Models Using DEVS Simulators

G.-D. Kapos, V. Dalakas, M. Nikolaidou, D. Anagnostopoulos
DOI: 10.4018/978-1-4666-4369-7.ch010
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Abstract

System models validation is an important engineering activity of the system development life-cycle, usually performed via simulation. However, usability and effectiveness of many validation approaches are hindered by the fact that system simulation is not performed using a system model described by a standardized modeling language as SysML. This requires system simulation models to be recreated from scratch, burdening the engineer and introducing inconsistencies between system and validation models. In this chapter, the authors present how system engineers may effectively perform SysML system model validation utilizing the original SysML model and standards-based simulated related extensions. This is achieved by a framework that exploits MDA concepts and techniques, such as profiling, meta-modeling, and formal transformations. This way an open, standards-based, customizable approach for SysML models validation using DEVS simulators is formed. A simple battle system is used as an example throughout the chapter to facilitate the presentation of the proposed approach.
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Introduction

Engineers from different fields usually resort to computer simulation in order to describe, understand, and predict the behavior of complex systems or systems of systems from various scientific fields. Discrete event simulation offers the means to evaluate some of these systems, not only in regular, but also under extreme circumstances in order to avoid errors. The majority of the engineers actually already resort to simulation in order to reduce risks. However, although the computational means are rapidly increasing and modern engineers are computer literate, there are no standardized manners to perform systems validation. Most of the engineers use specific computational environments that are usually expensive, commercial, de facto standards, or restricted in-house software tools.

In the last decade, there is a strong effort to standardize and unify frameworks and methodologies related to modeling and simulation, driven by international organizations such as ACM, SCS and/or OMG. Focus is set to extract additive value from standard languages and well-defined formalisms, in an open and hopefully more beneficial manner. A step towards the unification of the different approaches is the use of frameworks, based on open standards, which could bridge the gap, acting like an interface that allows useful information to transit among various tools. Let us, use here an example from the real world. One could see it as building bridges between islands. Although, these bridges should have foundations, solid enough, to carry the amount and types of information needed from both sides of the bridge, they should also be aesthetic and functional (i.e., the user should feel comfortable to use them without fear and without any further experience). The user should have only one consideration: source and destination.

Towards this effort, this chapter presents step-by-step a methodology for simulating system models with the aid of a working example. Emphasis is given on the benefits gained by the use of formal modeling and meta-modeling representations and standard transformations.

The goal of this chapter is to offer the reader the ability to:

  • Perform a SysML model enrichment,

  • Transform to DEVS executable models,

  • Perform DEVS model execution,

  • Expand, if interested the presented framework to other cases of interest.

More specifically the authors would try to illustrate how to create and enrich a model through MagicDraw or any other UML/SysML tool. Models are then transformed to DEVS models by means of open tools and standard languages such as QVT. Finally, these models may be executed in a simulation environment offered by a community outside OMG.

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Background

This section reviews the most important theoretical notions used throughout this chapter in order to facilitate the reader. The most interested reader should resort to literature. The approach followed here concerns theory related to the interconnection among SysML and simulation activity in brevity. On the contrary, people with deep knowledge of SysML, MDA, and/or DEVS may skip the whole section.

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