Top1. Overview And Chapter Objectives
During the last decade, the rapid development of electronics technology has produced several new devices at nanoscale dimensions (nanodevices). Nanodevices, are the tiny devices whose dimensions are in the order of nanometers (or less than 100nm however). The information carriers in these devices are the particles or quasi particles that can carry and transport information objects or signals. The most famous example of an information carrier is the electron charge in conventional semiconductor devices. Also, photons in photonic and optoelectronic devices and the electron spin in spintronic devices can be considered as information carriers. In addition, other quasi particles, such as phonons (quasi particles associated with lattice vibration waves) may be considered as information carriers, because they are capable of transporting energy from point to another in solid-state devices. The recent research in nanodevices is focused around the control of such information carriers and to exploit their features to build new devices with superior characteristics in terms if speed and integration density. Naturally, great efforts have been dedicated to understanding the transport mechanisms of such information carriers in semiconductors and nanostructures.
The transport theory of information carriers forms the basis of any physical device model. The transport models are used in Technology/Computer-Aided Design (TCAD) tools to simulate the device behavior, in terms of its structure and geometry as well as external boundary conditions of voltage and current. In fact, the transport of information carriers is a non-equilibrium phenomenon, where the role of external forces plays a crucial role. External forces which drive the device out of equilibrium may be electromagnetic in origin, such as the electric fields associated with an applied bias, or the excitations of electrons by optical sources. Alternately, thermal gradients and electrochemical potentials may also provoke the transport of charge carriers and therefore create external currents and voltages drops, across the device. The Figure1 depicts the role of carrier transport models in TCAD simulation tools and how they are used to calculate the current-voltage (I-V) and capacitance-voltage (C-V) characteristics of a certain device and interact with other electronic design automation (EDA) tools. Also, Figure 2 depicts the different levels of transport models, in device simulation. As shown, the TCAD tools are based on semiclassical and quantum transport models. These models range from ab-initio physical models, which describe the transport of information carriers from first principles down to compact models that describe the outer behavior (usually the I-V and C-V) of devices and circuits. The success of nanotechnology to produce well-functioning nanodevices and systems is mortgaged by the availability of suitable and efficient transport models that meet the challenges at the nanoscale.
Figure 1. Electronic design automation (EDA) lifecycle and carrier transport modeling in TCAD Tools; in the EDA section, DFT=Design for Testability, LVS=Layout versus Schematic, DRC=Design Rule Checking and GDSII is a design file format.
As shown in Figure 2, the transport models cover a wide scale, from classical to quantum transport, according to their accuracy and the required computational costs. Actually, a single description in the hierarchy of transport models may not be suitable to provide the correct behavior of all devices.
Figure 2. Complexity (accuracy) of transport models versus computational time (cost)