The main design goals of an LNA are to achieve low noise figure, high gain, good linearity and good matching and reverse isolation. The choice of the LNA topology is therefore very important to suit the design application. Five LNA topologies were studied, analyzed and compared in this chapter. The topologies are the Simultaneous Noise and Input Matching (SNIM), Power-constrained Simultaneous Noise and Input Matching (PCSNIM), Current-reuse (CR) and Folded-cascode (FC) LNAs. The last topology is the PCSNIM with buffer. The circuits are analyzed in detail in terms of their functionality and compared based on the LNAs typical performance metrics. From the analysis, the PCSNIM technique can improve matching and noise performance of the inductively degenerated cascode. The current-reuse is found to consume less current but maintaining the circuit’s transconductance to achieve the desirable gain. The folded-cascode operates at lower voltage and hence is suitable for low-powered designs. Consequently, it is also resulting in the lowest noise-figure amongst the other designs.
TopIntroduction
The inductively-degenerated common-source (CS) cascode is preferred over other architectures such as CS with shunt-input resistor, common-gate (CG), and shunt-series amplifiers (Lee, 2004) due to its ability to provide low noise figure.
In this chapter, four LNA topologies of the modified inductively-degenerated cascode LNA were studied, analyzed and compared. The topologies studied are the Simultaneous Noise and Input Matching (SNIM), Power-constrained Simultaneous Noise and Input Matching (PCSNIM), Current-reuse (CR) and Folded-cascode (FC) LNAs. As the name implies, the SNIM method enables simultaneous noise and input matching. However, there is a constraint in implementing this method as the NF will differ away from the NFmin when the device gets smaller or when the design is for low power implementation (Nguyen et al., 2004). The PCSNIM is an evolution of the SNIM which enables simultaneous noise and input matching even for small devices and low power operation (Nguyen et al., 2004). With the addition of a buffer at the output of the PCSNIM, impedance transformation is obtained to to enable the output stage of PCSNIM to be matched to a lower impedance load. In the CR, an NMOS in a cascode is replaced with an inverter-like combination of PMOS and NMOS to reduce power consumption but maintaining the transconductance in order not to reduce the gain (Karanicolas, 1996). Finally, the FC LNA was not only designed for low voltage operation but also for good noise performance (Abou-Allam & Manku, 1998).
From the analysis of the topologies modified from the inductively-degenerated cascode LNA, a new topology is given to provide good gain and noise performance without the need of external matching circuitries.
This chapter is divided according to the five topologies involved in the study. Under each division, the functionality of each topology is studied. The characteristics that distinguished one topology from the rest are analyzed. Comments on the capabilities of each topology in achieving the desired performance metrics are given. Derivations of equations are given to enable better understanding on how the circuits perform. Simulations were performed on all five designs based on the typical performance metrics of the LNA and the results given. Results will be discussed and followed by conclusions.