Modelling and Realisation of a Three-Level PWM Inverter Using a DSP Controller to Feed an Asynchronous Machine

1. Introduction

The three level inverters often referred to as Neutral Point Clamped (NPC) inverters offer several advantages over the more common two level inverters. As compared to two level inverters, three level inverters have smaller output voltage steps that mitigate motor issues due to long power cables between the inverter and the motor. These issues include surge voltages and rate of voltage rise at the motor terminals and motor shaft bearing currents. In addition, the cleaner output waveform provides an effective switching frequency twice that of the actual switching frequency. Should an output filter be required, the components will be smaller and less costly than for an equivalent rated two level inverter. Most often the NPC inverter is used for higher voltage inverters. Since the IGBTs are only subjected to half of the bus voltage, lower voltage IGBT modules can be used.

Figure 1 shows the circuit configuration of the NPC inverter. Each leg has four IGBTs connected in series. The applied voltage on the IGBT is one-half that of the conventional two level inverters. The bus voltage is split in two by the connection of equal series connected bus capacitors. Each leg is completed by the addition of two clamp diodes.

Figure 1.

NPC inverter

This topology has been used traditionally for medium voltage industrial applications. In addition to the capability of handling higher voltages, the NPC inverter has several favorable features including lower line-to-line and common mode voltage steps and lower output current ripples for the same switching frequency as that used in a two level inverter.

An attempt is made to present the most common multilevel (three-level) inverters and briefly describe their advantages and disadvantages based on a literature survey. The literature survey is intended to compare the inverters based on their performance aspects and the challenges and restrictions they could impose for application in a given area.

The fundamental purpose of considering multilevel inverters instead of the popular two-level inverters is due to the high value of DC-link voltage that needs to be employed in future developments. With the increase in the DC-link voltage, it is aimed that the performance of the inverter in use does not degrade and hence, multilevel inverter options have been considered.

The increase in power-handling capabilities of the power electronic switches has made the use of multilevel inverters feasible for high-power applications. For high voltage and high power systems, instead of using switches with high voltage ratings, it is beneficial to connect the switches having low-voltage ratings in series (Tolbert et al., 1997). This allows the latter to be switched faster than the switches having higher voltage ratings, thus resulting in switching harmonics of higher frequencies which can be filtered easily.

Due to the dynamic voltage sharing problem when the switches are connected in series, multilevel power inverters have come into existence and they are being used due to several advantages that they offer over the conventional two-level converters. However, in principle, with increased DC-link voltage, there are different ways in which the semiconductor devices can be connected, that is

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  Using switching devices with higher voltage rating. However, this involves high dV/dt stress and renders slower switching due to high voltage level.

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  Series connection of devices, however, dynamic voltage sharing among the devices represents a big challenge for this option.

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  Adopting the multilevel solution which is more preferable due to the limited voltage ratings for the semiconductor devices.

There are a number of multilevel inverters introduced since the year 1975 but the three basic and most well-known topologies are the Cascaded H-Bridge Multilevel Converter (CHB), Neutral Point-Clamped Multilevel Converter (NPC) and the Flying Capacitor Multilevel Converter (FCC). These three basic topologies have been widely accepted for industrial applications (Rodriguez et al., 2002).