Processor for Mobile Applications

Processor for Mobile Applications

Ben Abdallah Abderazek (University of Aizu, Japan), Arquimedes Canedo (University of Electro-Communications, Japan) and Kenichi Kuroda (University of Aizu, Japan)
Copyright: © 2009 |Pages: 13
DOI: 10.4018/978-1-60566-046-2.ch035
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Mobile processors are used in numerous embedded systems, including laptops, personal digital organizers, wearable computers, cellular phones, mobile Internet terminals, digital cameras, digital cam-coders, smart cards, and sensor networks nodes. Although these systems differ in terms of their communication and computation requirements, they share the common need for low power, security and small memory footprint. This chapter presents the software and hardware architecture and the design results of a low power processor architecture based on queue computation model, which offers an attractive option in the design of mobile and embedded systems.
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Queuecore Compiler Overview

Compiling for the queue computation model differs from the conventional techniques used in compilers for register machines since queue instructions require an offset reference value rather than a location name (e.g., register number). In (Canedo, Abderazek & Sowa, 2007; Canedo, 2006), we have investigated and developed the code generation algorithm specifically for the queue computation model. In this section, we describe the design of the queue compiler infrastructure.

Key Terms in this Chapter

RISC: Reduced Instruction Set Computer

Circular-Queue: A circular queue is a particular implementation of a Queue (First-in-First-Out) data structure.

Queue: A queue is a data structure that takes its name from a physical queue, such as at a supermarket. Items are inserted into a queue at one end and removed at the other. This principle is often referred to as FIFO (which stands for First In First Out) because the first item into the queue is the first one out.

Produced Order: It is a computing model where operands are fetched from the head of the Queue.

Directed Acyclic Graph: A directed acyclic graph, also called a DAG, is a directed graph with no directed cycles; that is, for any vertex v, there is no nonempty directed path that starts and ends on v.

Queue Computing: A computation model based on queue data structure.

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