Programmability and Scalability on Multi-Core Architectures

Programmability and Scalability on Multi-Core Architectures

Jaeyoung Yi (Yonsei University, Korea), Yang J. Jang (Yonsei University, Korea), Doohwan Oh (Yonsei University, Korea) and Won W. Ro (Yonsei University, Korea)
Copyright: © 2010 |Pages: 19
DOI: 10.4018/978-1-60566-661-7.ch012


In this chapter, we will describe today’s technological trends on building a multi-core based microprocessor and its programmability and scalability issues. Ever since multi-core processors have been commercialized, we have seen many different multi-core processors. However, the issues related to how to utilize the physical parallelism of cores for software execution have not been suitably addressed so far. Compared to implementing multiple identical cores on a single chip, separating an original sequential program into multiple running threads has been an even more challenging task. In this chapter, we introduce several different software programs which can be successfully ported on the future multi-core based processors and describe how they could benefit from the multi-core systems. Towards the end, the future trends in the multi-core systems are overviewed.
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2 Background Study: Hardware Designs Of Multi-Core Architecture

In this section, the general hardware architecture of current multi-core processors is surveyed as background study. We first describe the basic method to build multi-core processors and then describe the memory hierarchy design issues for multi-core system.

Key Terms in this Chapter

Multi-Core: Multi-core are multi-core architectures with a high number of cores.

Instruction-Level Parallelism (ILP): ILP is a measure of how many of the instructions in a computer program can be computed simultaneously.

Multiprocessor: Multiprocessor is a single computer system that has two or more processors.

Cache Coherency: Cache coherence is a method of managing conflicts and maintain consistency between cache and memory.

Compiler: A compiler is a set of programs that translates text written in a computer language (the source language) into an another computer language (the target language).

Thread-Level Parallelism (TLP): TLP is a form of executing threads across different parallel computing nodes

Parallelism: Parallelism is a method of computation in which many calculations are carried out simultaneously.

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