Roles of Non-Volatile Devices in Future Computer Systems: Normally-Off Computers

Roles of Non-Volatile Devices in Future Computer Systems: Normally-Off Computers

Koji Ando (National Institute of Advanced Industrial Science and Technology (AIST), Japan), Sumio Ikegawa (Toshiba Corporation, Japan), Keiko Abe (Toshiba Corporation, Japan), Shinobu Fujita (Toshiba Corporation, Japan) and Hiroaki Yoda (Toshiba Corporation, Japan)
Copyright: © 2012 |Pages: 25
DOI: 10.4018/978-1-4666-1842-8.ch005
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Abstract

Normally-off Computer (NOC) is a computer designed with a new concept in which most parts of a computer use non-volatile functionalities. The power of NOC will be completely turned off at short intervals when computing is not required without users even being aware of it. Thus far, slow latency, limited endurance, and small capacity of non-volatile memories have been preventing the implementation of non-volatile functionalities into computer architecture. Emerging magnetic memory, Spintronic RAM (Spin-RAM), is now changing the premise of computer design. Spin-RAM will soon replace dynamic RAM, and will actualize instant-on computer. For NOC, however, inventors must develop many new technologies including non-volatile cache memories, hierarchical non-volatile memory architecture, advanced power gating, non-volatile peripheral circuits, and non-volatile displays. The authors discuss the present status of Spin-RAM technology and the challenges for achieving NOC.
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Memories In Computer Architecture

It is interesting to point out that the precursors of the computer, such as the abacus, slide rule, and mechanical calculators, were intrinsically non-volatile. When electronic devices, such as vacuum tubes and transistors, were introduced into calculators for increasing calculation speed, the non-volatile functionality began to be phased out. Non-volatile magnetic core memory used for main memory was the last one to withstand this trend. However, it was also eventually replaced with volatile DRAM, which is produced with the Si planer integration process and has more memory capacity than core memory. This history indicates that unless fast access speed, i.e., latency, and large memory capacity are achieved simultaneously, we cannot implement non-volatile functionalities into computer architecture (Figure 1).

Figure 1.

Typical architecture of computer

The slow latency of memory has been a serious problem even for DRAM. In the first PCs, the processor and DRAM were directly connected to each other because their performances were well balanced. However, in the 30 years from the first PCs, processor performance has been improved by about 20,000 times while improvement in DRAM latency was less than 10 times (Hennessy, 2006). This large gap comes from the different natures of transistor circuits and memory. All Arithmetic Logic Unit (ALU)/FlipFlop, register files, and caches are transistor-only circuits. The register files and caches are made with Static RAM (SRAM) “memory,” but SRAM is not a genuine memory. It is a transistor flip-flop circuit that emulates the memory function. The dramatic improvement in transistor performance over the past 30 years has led to the surprising improvement of processor performance.

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