Si-NWs: Major Advances in Synthesis and Applications

Si-NWs: Major Advances in Synthesis and Applications

Maha Mohamed Khayyat (Umm al-Qura University, Saudi Arabia) and Brahim Aïssa (MPB Technologies Inc., Canada)
DOI: 10.4018/978-1-4666-5824-0.ch005
OnDemand PDF Download:


Surfaces and interfaces have a special significance to nanotechnology because the surface/volume ratio of nanomaterials is larger than for the bulk ones. Therefore, interfaces of nanomaterials are more important to the properties of the nanomaterials than for larger scale materials. Moreover, crystal growth and more particularly Nanowires (NWs) growth occurs at the interfaces between the growing crystals and the supply media. This chapter focuses on the silicon nanowires grown using a Vapor-Liquid-Solid (VLS) concept. One of the key advantages of VLS is that controlled placement or templating of the seed metal produces templated NW growth. This templating is required for integration of NWs with other devices, which is desirable for many applications. The authors discuss issues on the discovery of fundamentally new phenomena versus performance benchmarking for many of the Si-NW applications. Finally, the authors attempt to look into the future and offer their personal opinions on the upcoming trends in nanowire research.
Chapter Preview


Silicon nanowires (Si-NWs) have recently attracted considerable attention due to the historical role of Si in devices fabrication and in the integrated circuits (IC) industry. Continued high performance from Si may require integration of innovative architectures of NWs with the exciting functional devices. Si-NWs may provide new avenues in these directions. Recently, Si-NWs have been used in the fabrication of DNA sensors (Li et al.,, 2004). The ability to control the unique morphological and mechanical properties of Si-NWs arrays demonstrated by Paulo and coworkers (Paulo et al., 2007) opens new perspectives for the development of array based electrical and electrochemical systems. In addition, there are studies (Schmidt and coworkers, 2006 & Cui and coworkers, 2003) of fabricating Si-NWs vertical surround-gate field effect transistor (VS-FET). It has been reported (Huo et al., 2004) that room temperature electroluminescence has been appeared from undoped Si-NWs that were grown from disilane at a wavelength excitation of 600 nm. It has been as well shown recently that Si-NWs have been used to produce high resolution Atomic Force Microscope (AFM) (Cohen et al., 2012).

Device applications utilizing Si-NWs have been demonstrated in many different applications including optoelectronic and electrical devices, as well as solar cells (Huang et al., 2004; Kayeset et al., 2005; Law, 2004; Samuelson, 2004). This chapter will focus on wires grown using a vapor-liquid-solid (VLS) concept or similar three phase process (Givargizov, 1975; Wacaserand et al., 2009; Wagner & Ellis, 1964).One of the key advantages of the VLS process is that the controlled placement or templating of the seed metal produces templated NW growth. This templating is required for the straightforward integration of NWs with other devices which is desirable for many applications. Templated growth of NWs have been achieved using various noble metals like Au, Ag and Cu as the seed sites (Fan et al., 2006; Kayesand et al., 2007; Westwater, 1997) but for more reactive metals like Al, Sn and Sb templating has often proven difficult. The noble metals can often negatively affect the semiconductor properties of the nanowire from an application perspective (Fan et al., 2006; Renardand coworkers., 2009; Wacaserand et al., 2009; Whang et al., 2007; Ke et al., 2009; Chaudhari et al., 2010). For example Au is a deep level trap in Si. Whereas the more reactive metals like Al, Sb, and Sn are less parasitic and can even be positive in terms of acting as desirable dopants when incorporated in the semiconductors (Tutuc et al., 2006; Roberts et al., 1981; Krug, 2008).Controlling spatial placement of VLS grown nanowires with oxygen reactive seed metals is therefore of great interest for nanotechnology based applications (Wang and coworkers2010).

Key Terms in this Chapter

Nanocrystal: Orderly crystalline aggregates of 10s to 1000s of atoms or molecules with diameters in the range of approximately 100 nm.

PECVD: Plasma enhanced chemical vapor deposition method.

Nanolithography: Writing in three dimensions in nanoscale.

UHVCD: Ultra high vacuum chemical vapor deposition method.

MBE: Molecular beam deposition method.

AFM: Atomic force microscope; which is one of the foremost tools for imaging, measuring, and manipulating matter at the nanoscale level. The information is gathered by “sensing” the surface with a mechanical probe or tip called a cantilever with a sharp tip at its end that is used to scan a sample surface. The cantilever is typically silicon or silicon nitride with a tip radius of curvature on the order of nanometers.

Epitaxy: A type of growth where the growing crystal retains crystallographic information from the substrate.

LSMCVD: Liquid source misted chemical vapor deposition.

ALD: Atomic layer deposition method.

Nanoscale Chemical Templating: A method of fabricating semiconductor nanowires on a surface of a semiconductor substrate in which the spatial placement of the semiconductor nanowires is controlled by using an oxygen reactive seed material.

Bottom-Up: Building larger structures from molecular building blocks.

VLS: A growth method of semiconductor nanowire which is based on different phases in the system; vapor-liquid-solid mechanism.

PLD: Pulsed laser deposition method.

Nucleation: A term used in crystallography to describe the process that occurs when two or more atoms from the supply media chemically bind to form a molecular unit.

CVD: Chemical vapor deposition method.

Complete Chapter List

Search this Book: