A Simulator for High-Performance Processors

A Simulator for High-Performance Processors

John Morris (University of Auckland, New Zealand)
Copyright: © 2006 |Pages: 17
DOI: 10.4018/978-1-59140-735-5.ch014
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Abstract

This chapter describes a Web-based modular, extensible processor simulator designed as an aid to teaching computer architecture. It is written entirely in Java, which allows it to be easily embedded in other Web-based course materials and to run anywhere. Users configure a collection of Java classes which model individual processor modules. Java’s dynamic class loading capability means that students in advanced classes are able to incorporate new modules by simply writing new classes and adding them to a configuration file which specifies the new modules’ connections to other modules. The modular structure means that it can be used for both introductory computer organization and more advanced processor architecture courses. For example, it can be used to demonstrate how (a) the data path of a modern processor is structured, (b) pipelining keeps multiple instructions in flight at any time, (c) hazards occur, and (d) resource conflicts are resolved. Processing modules follow a simple design pattern which correctly simulates the behavior of a complex synchronous processor. The design is simple, yet powerful enough to model complex data paths with extensive feedback capabilities. To manage complexity, the system being simulated may be specified as a hierarchy of models, each of which can be viewed in a separate window on demand. This provides a customizable level of detail to students studying processor operation.

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