Single-Electron Devices and Circuits Utilizing Stochastic Operation for Intelligent Information Processing

Introduction

Many single-electron devices and circuits that realize CMOS-like digital logic were proposed so far (Takahashi, Ono, Fujiwara, & Inokawa, 2002). However, the single-electron circuit technology should aim at developing computing systems that perform information processing by using single-electron phenomena (Morie, & Amemiya, 2006). Because their operation principles are completely different from that of conventional CMOS devices, we have developed a scenario for achieving large-scale integrated systems of single-electron devices as summarized in Figure 1.

Figure 1.

Single-electron circuit system design scenario. Morie et al. (2002).Nanosci. Nanotech, 2, 343, 2002.

Single-electron devices should be used for massively parallel processing with a huge number of devices because of their large packing density and ultra-low power dissipation. The processing speed is improved by parallel operation. Few logic stages, a small fanout, regularity and repeatability in the circuit architecture overcome the interconnection complexity and lowers the background-charge effects. Parallel operation and such circuit architecture may make deep logic processing more difficult. Therefore, the use of ultra-small CMOS devices is essential. Single-electron devices should be used for simple functional circuits with few logic stages, and ultra-small CMOS devices are used for multistage logic circuits.

To overcome the design difficulty, it is important to use large output capacitance as a buffer for each circuit component. Here, “large” means a capacitance value that can store a few tens of electrons. Because of this output buffer, the operation of the circuit component is not affected by the following stage circuit, and thus modularized circuit design is applicable. The output capacitance is also used for an interface between SET and CMOS circuits. The information generated by massively parallel processing in SET circuits is collected and integrated into the output buffer and is transferred to the CMOS circuits.

The gate capacitance of an ultra-small MOS device can be used as the buffer capacitance. In order to reduce the sensitivity to capacitance and background charges, new information-processing concepts and models also are required in addition to solutions regarding the averaging of information or redundancy configurations.

The functionalities created by the single-electron operations and available for new information processing systems are as follows: (1) multi-inputs circuits using multi-gate configuration in single-electron devices, (2) non-monotone input-output functions due to multi-peak (oscillatory) characteristics of single-electron operation, (3) stochastic operation due to stochastic tunneling phenomena, (4) energy minimization. Circuits and architectures using these functionalities for associative processing and spiking neurons are reviewed in this paper.