Spread Spectrum Watermarking: Implementation in FPGA

Introduction

Recent years have witnessed a prolific growth in digital techniques as well as in wireless communication system. Two-fold advantages, namely (i) the wide use, ease of copying, manipulation and distribution of multimedia signals over Internet, and (ii) worldwide mobility between the transmission and the reception system have now been achieved. Today various wireless mobile communication services offer data transmission along with voice-based applications (Hanzo, 2001). Two classes of problems have also been emerged, namely (i) how to protect the ownership, authenticity, integrity and security of the transmitted digital data, and (ii) how to ensure end-to-end quality of the offered multimedia services in third or future generation mobile communication system [IMT2000/Universal Mobile Telecommunication System (UMTS)] (Li, 2001). Digital watermarking scheme, though originally developed as a potential solution for copyright protection and authentication of digital data (Voyatzis, 1999; Dittman, 1999; Fridrich, 2000) has also been attempted in recent times for some non-conventional applications such as broadcast monitoring, security in communication, authentication and blind assessment of quality of services (QoS) for multimedia signals in mobile radio network.

Spread spectrum (SS) watermarking has proven to be efficient, robust and cryptographically secure (Maity, 2007). Spread spectrum communication has two characteristics that are important to watermarking, namely (i) it may help in achieving high document-to-watermark ratio (DWR) leading to low distortion due to watermark insertion and (ii) it can also help to achieve robustness against forced removal of hidden data. The concept of spectrum spreading principle of digital communication is exploited to convert anti-jamming and interference rejection attributes in the form of robustness, which in turn suggests that SS watermarking can easily be integrated with many existing data transmission schemes. This integration, in other way, demands development of several fragile SS watermarking methods suitable for various non-conventional applications such as broadcast monitoring, security in communication, authentication and blind assessment of quality of services (QoS) for multimedia signals in mobile radio network. Such fragile SS watermarking methods with low computation cost may provide facility of real time implementation through hardware realization. Hardware implementation of digital watermarking offers advantages over software realization in terms of less area, low execution time, low power, real-time performance, high reliability and also ease of integration with existing consumer electronic devices (Kougianos, 2009). The software designer does not have direct control over the way random access memory (RAM) and processors interact, posing a limit on speed. A software designer must try to limit the total amount of RAM required, while a hardware designer has full control over timing operations into the RAM and direct control over the usage of expensive hardware resources (Mathai, 2003).

Although software implementation may be appealing due to faster implementation, there are a few compelling reasons for a move toward hardware implementation. For example, in consumer devices adding the watermark component through hardware implementation is economically beneficial as it consumes small dedicated area of silicon. On the other hand, software implementation often requires dedicated processor such as a digital signal processing (DSP) core that occupies considerably more area, consumes significantly more power, and may still not perform adequately fast (Mathai, 2003). If a chip is fitted in the digital devices, the output video or images can be marked right at the origin, although the same can be done using software after those videos or images downloaded to the computer. But in this case embedding software will take more time compared to hardware. The example of TV broadcast will highlight the significance where digital media is to be marked in real time and hardware is the only solution.

The chapter briefly reviews the state-of-the art hardware implementation aspect of digital watermarking methods followed by the description of two different architectures for spatial and transform domain SS watermarking using field programmable gate array (FPGA). A brief description on hardware architecture for biorthogonal wavelet based Hilbert transform is then presented with an objective that readers may develop suitable hardware architecture for quadrature carrier multiplexing (QCM) -SS watermarking from the two previous architectures. The overall objective is to give an idea how to develop low cost watermarking algorithms along with their hardware design for real-time applications.