Task Migration in Embedded Systems: Design and Performance

Task Migration in Embedded Systems: Design and Performance

Abderrazak Jemai (University of Tunis El Manar, Tunisia & University of Carthage, Tunisia), Kamel Smiri (University of Tunis El Manar, Tunisia & University of Kairouan, Tunisia) and Habib Smei (ISET de Rades, Tunisia)
DOI: 10.4018/978-1-4666-3922-5.ch013
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Abstract

Task migration has a great consideration is MPSoC design and implementation of embedded systems in order to improve performance related to optimizing execution time or reducing energy consumption. Multi-Processor Systems-on-Chip (MPSoC) are now the leading hardware platform featured in embedded systems. This chapter deals with the impact of task migration as an alternative to meet performance constraints in the design flow. The authors explain the different levels of the design process and propose a methodology to master the migration process at transaction level. This methodology uses some open source tools like SDF3 modified to provide performance estimation at transaction level. These results help the designer to choose the best hardware model in replacement of the previous software implementation of the task object of migration. Using the SDF3 tool, the authors model a multimedia application using SDF graphs. Secondly, they target an MPSoC platform. The authors take a performance constraint to achieve 25 frames per second.
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2. An Approach For Performance Estimation Of Mpsoc Systems With Sdf Graphs

We propose in this chapter a methodology for performance estimation of MPSoC systems with SDF graphs, which is called the methodology for software-to-hardware migration performance estimation (Smiri & Jemai, 2009; Eindhoven University of Technology, 2009). It targets performance estimation multimedia applications on NoC-MPSoC systems.

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