Using Machine Learning Techniques for Performance Prediction on Multi-Cores

Using Machine Learning Techniques for Performance Prediction on Multi-Cores

Jitendra Kumar Rai (ANURAG, Hyderabad, India), Atul Negi (University of Hyderabad, India) and Rajeev Wankar (University of Hyderabad, India)
DOI: 10.4018/978-1-4666-2065-0.ch017
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Abstract

Sharing of resources by the cores of multi-core processors brings performance issues for the system. Majority of the shared resources belong to memory hierarchy sub-system of the processors such as last level caches, prefetchers and memory buses. Programs co-running on the cores of a multi-core processor may interfere with each other due to usage of such shared resources. Such interference causes co-running programs to suffer with performance degradation. Previous research works include efforts to characterize and classify the memory behaviors of programs to predict the performance. Such knowledge could be useful to create workloads to perform performance studies on multi-core processors. It could also be utilized to form policies at system level to mitigate the interference between co-running programs due to use of shared resources. In this work, machine learning techniques are used to predict the performance on multi-core processors. The main contribution of the study is enumeration of solo-run program attributes, which can be used to predict concurrent-run performance despite change in the number of co-running programs sharing the resources. The concurrent-run involves the interference between co-running programs due to use of shared resources.
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Introduction

Multi-core has become the dominant processor architecture at present. Majority of the computing systems are based on multi-core processors, which include both the desktops as well as servers. In future the number of cores on a single processor chip is going to increase with the upcoming generations of processors. Most of the recent multi-core processors have last level caches, which are shared among the cores (Intel Corporation; Kongetira, Aingaran, & Olukotun, 2005; Golla, 2006). Programs co-running on the cores of multi-core processors also share other resources such as hardware prefetch unit, Front Side Bus (FSB) and memory controller along with last level caches. Along with the growth in number of cores per chip with the generations of processors, future multi-core based systems are poised to witness increased degree of sharing of the resources.

The interference between programs co-running on the cores sharing the resources causes degradation in the performance of systems based on multi-core processors. For example a process on one core may cause the eviction of data belonging to process on the other core, with which it shares the cache space. Such interference between co-running programs due to use of shared cache space can cause the performance of simultaneous running processes to get affected by each other. We measured the performance of some of programs from SPEC cpu2006 benchmark suite (SPEC, 2006) on our Intel quad-core Xeon X5482 processor based experimental platform (described in section named EXPERIMENTAL PLATFORMS) for their solo-run as well as concurrent-run. The values of solo-run and concurrent-run performance for those programs in terms of cycles per instruction (CPI) are mentioned in Table 1.

Table 1.
Solo-run and concurrent-run performance of some of the SPEC cpu2006 programs on Intel Xeon X5482 processor
Program NamesPerformance in terms of CPI, for
Solo-runConcurrent-run, when co-runner is
429.mcf433.milc459.GemsFDTD
429.mcf5.898.3710.1510.04
433.milc2.412.893.463.54
459.GemsFDTD1.621.982.212.39
462.libquantum1.672.243.053.06
410.bwaves1.171.361.451.53

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