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What is Cache Coherency

Handbook of Research on Scalable Computing Technologies
Cache coherence is a method of managing conflicts and maintain consistency between cache and memory.
Published in Chapter:
Programmability and Scalability on Multi-Core Architectures
Jaeyoung Yi (Yonsei University, Korea), Yang J. Jang (Yonsei University, Korea), Doohwan Oh (Yonsei University, Korea), and Won W. Ro (Yonsei University, Korea)
Copyright: © 2010 |Pages: 19
DOI: 10.4018/978-1-60566-661-7.ch012
Abstract
In this chapter, we will describe today’s technological trends on building a multi-core based microprocessor and its programmability and scalability issues. Ever since multi-core processors have been commercialized, we have seen many different multi-core processors. However, the issues related to how to utilize the physical parallelism of cores for software execution have not been suitably addressed so far. Compared to implementing multiple identical cores on a single chip, separating an original sequential program into multiple running threads has been an even more challenging task. In this chapter, we introduce several different software programs which can be successfully ported on the future multi-core based processors and describe how they could benefit from the multi-core systems. Towards the end, the future trends in the multi-core systems are overviewed.
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On-Chip Networks for Modern Large-Scale Chips
The protocol that ensures that copies of data in a shared address space stored in local processor caches are consistent (up to date). This includes searching for and invalidating data in remote caches.
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