Welcome to the InfoSci Platform
Low Power Design Techniques: Classical and beyond CMOS Era

Low Power Design Techniques: Classical and beyond CMOS Era

Mohd Samar Ansari, Shailendra Kumar Tripathi
Copyright: © 2016 |Pages: 26
ISBN13: 9781522501909|ISBN10: 1522501908|EISBN13: 9781522501916
DOI: 10.4018/978-1-5225-0190-9.ch001
Cite Chapter Cite Chapter

MLA

Ansari, Mohd Samar, and Shailendra Kumar Tripathi. "Low Power Design Techniques: Classical and beyond CMOS Era." Design and Modeling of Low Power VLSI Systems, edited by Manoj Sharma, et al., IGI Global, 2016, pp. 1-26. https://doi.org/10.4018/978-1-5225-0190-9.ch001

APA

Ansari, M. S. & Tripathi, S. K. (2016). Low Power Design Techniques: Classical and beyond CMOS Era. In M. Sharma, R. Gautam, & M. Khan (Eds.), Design and Modeling of Low Power VLSI Systems (pp. 1-26). IGI Global. https://doi.org/10.4018/978-1-5225-0190-9.ch001

Chicago

Ansari, Mohd Samar, and Shailendra Kumar Tripathi. "Low Power Design Techniques: Classical and beyond CMOS Era." In Design and Modeling of Low Power VLSI Systems, edited by Manoj Sharma, Ruchi Gautam, and Mohammad Ayoub Khan, 1-26. Hershey, PA: IGI Global, 2016. https://doi.org/10.4018/978-1-5225-0190-9.ch001

Export Reference

Mendeley
Favorite

Abstract

Conventional CMOS based IC implementations are soon expected to attain a state of saturation mainly due to technological barriers and physical constraints. A number of nanoelectronic devices that may be viable alternatives to standard CMOS have been put forward, and these could pave way for even lower power circuits. Some worthy contenders are carbon nanotube field effect transistor, nanowire field effect transistor, tunnel field effect transistor, and the single electron transistor. In this chapter, device- and circuit-level techniques have been discussed for designing low power circuits in conventional CMOS. Moreover, various sources of power consumption have been reviewed. It is also attempted to review the major components of power i.e. dynamic, short-circuit, and leakage, followed by basics of device and circuit level techniques to reduce the power components. Further, pertinent features of emerging nanoelectronic devices are discussed. These beyond-CMOS devices are expected to revolutionize the era of electronic systems with their low power & high performance characteristics.

Request Access

You do not own this content. Please login to recommend this title to your institution's librarian or purchase it from the IGI Global bookstore.