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OpenMP-Based Approach for High Level C Loops Synthesis

OpenMP-Based Approach for High Level C Loops Synthesis

Emna Kallel, Yassine Aoudni, Mohamed Abid
Copyright: © 2017 |Volume: 5 |Issue: 1 |Pages: 16
ISSN: 2166-7160|EISSN: 2166-7179|EISBN13: 9781522515531|DOI: 10.4018/IJSI.2017010101
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MLA

Kallel, Emna, et al. "OpenMP-Based Approach for High Level C Loops Synthesis." IJSI vol.5, no.1 2017: pp.1-16. http://doi.org/10.4018/IJSI.2017010101

APA

Kallel, E., Aoudni, Y., & Abid, M. (2017). OpenMP-Based Approach for High Level C Loops Synthesis. International Journal of Software Innovation (IJSI), 5(1), 1-16. http://doi.org/10.4018/IJSI.2017010101

Chicago

Kallel, Emna, Yassine Aoudni, and Mohamed Abid. "OpenMP-Based Approach for High Level C Loops Synthesis," International Journal of Software Innovation (IJSI) 5, no.1: 1-16. http://doi.org/10.4018/IJSI.2017010101

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Abstract

The complexity of embedded systems design is continuously augmented, due to the increasing quantity of components and distinct functionalities incorporated into a single system. To deal with this situation, abstraction level of projects is incessantly raised. In addition, techniques to accelerate the code production process have appeared. In this context, the automatic code generation is an interesting technique for the embedded systems project. This work presents an automatic VHDL code generation method based on the OpenMP parallel programming specification. In order to synthesize C code for loops into hardware, the authors applied the directives of OpenMP, which specifies portable implementations of shared memory parallel programs. A case study focused on the use of embedded systems for the DCT algorithm is presented in this paper to demonstrate the feasibility of the proposed approach.

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