CNTFET for Logic Gates Design

CNTFET for Logic Gates Design

Gurmohan Singh, Manjit Kaur, Yadwinder Kumar
ISBN13: 9781799813934|ISBN10: 1799813932|EISBN13: 9781799813958
DOI: 10.4018/978-1-7998-1393-4.ch004
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MLA

Singh, Gurmohan, et al. "CNTFET for Logic Gates Design." Major Applications of Carbon Nanotube Field-Effect Transistors (CNTFET), edited by Balwinder Raj, et al., IGI Global, 2020, pp. 54-71. https://doi.org/10.4018/978-1-7998-1393-4.ch004

APA

Singh, G., Kaur, M., & Kumar, Y. (2020). CNTFET for Logic Gates Design. In B. Raj, M. Khosla, & A. Singh (Eds.), Major Applications of Carbon Nanotube Field-Effect Transistors (CNTFET) (pp. 54-71). IGI Global. https://doi.org/10.4018/978-1-7998-1393-4.ch004

Chicago

Singh, Gurmohan, Manjit Kaur, and Yadwinder Kumar. "CNTFET for Logic Gates Design." In Major Applications of Carbon Nanotube Field-Effect Transistors (CNTFET), edited by Balwinder Raj, Mamta Khosla, and Amandeep Singh, 54-71. Hershey, PA: IGI Global, 2020. https://doi.org/10.4018/978-1-7998-1393-4.ch004

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Abstract

The novel characteristics of CNTFET have eliminated many technological and fundamental hindrances being faced by CMOS transistors. CNTFET is emerging as prospective replacement for CMOS transistors in digital circuits and systems. This chapter introduces design of CNTFET-based basic logic gates. The basic logic gates analyzed are inverter, NAND, and NOR gates. The designed gates are evaluated in terms of delay, power consumption, and figure-of-merit power-delay-product (PDP). The standard H-SPICE CNTFET model of Stanford University has been used for all simulations. The impact of dielectric material variations on performance parameters of carbon nanotube field effect transistor based universal gates has been analyzed. Comparison between CMOS and CNTFET-based logic circuits is carried out for different dielectric material at 16 nm technology node.

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