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FPGA on Cyber-Physical Systems for the Implementation of Internet of Things

FPGA on Cyber-Physical Systems for the Implementation of Internet of Things

Rajit Nair, Preeti Nair, Vidya Kant Dwivedi
Copyright: © 2020 |Pages: 15
ISBN13: 9781522598060|ISBN10: 1522598065|ISBN13 Softcover: 9781522598077|EISBN13: 9781522598084
DOI: 10.4018/978-1-5225-9806-0.ch004
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MLA

Nair, Rajit, et al. "FPGA on Cyber-Physical Systems for the Implementation of Internet of Things." FPGA Algorithms and Applications for the Internet of Things, edited by Preeti Sharma and Rajit Nair, IGI Global, 2020, pp. 82-96. https://doi.org/10.4018/978-1-5225-9806-0.ch004

APA

Nair, R., Nair, P., & Dwivedi, V. K. (2020). FPGA on Cyber-Physical Systems for the Implementation of Internet of Things. In P. Sharma & R. Nair (Eds.), FPGA Algorithms and Applications for the Internet of Things (pp. 82-96). IGI Global. https://doi.org/10.4018/978-1-5225-9806-0.ch004

Chicago

Nair, Rajit, Preeti Nair, and Vidya Kant Dwivedi. "FPGA on Cyber-Physical Systems for the Implementation of Internet of Things." In FPGA Algorithms and Applications for the Internet of Things, edited by Preeti Sharma and Rajit Nair, 82-96. Hershey, PA: IGI Global, 2020. https://doi.org/10.4018/978-1-5225-9806-0.ch004

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Abstract

Today, in cyber-physical systems, there is a transformation in which processing has been done on distributed mode rather than performing on centralized manner. Usually this type of approach is known as Edge computing, which demands hardware time to time when requirements in computing performance get increased. Considering this situation, we must remain energy efficient and adaptable. So, to meet the above requirements, SRAM-based FPGAs and their inherent run-time reconfigurability are integrated with smart power management strategies. Sometimes this approach fails in the case of user accessibility and easy development. This chapter presents an integrated framework to develop FPGA-based high-performance embedded systems for Edge computing in cyber-physical systems. The processing architecture will be based on hardware that helps us to manage reconfigurable systems from high level systems without any human intervention.

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