Welcome to the InfoSci Platform
Transaction Level Model Automation for Multicore Systems

Transaction Level Model Automation for Multicore Systems

Copyright: © 2010 |Pages: 19
ISBN13: 9781605667508|ISBN10: 1605667501|ISBN13 Softcover: 9781616923853|EISBN13: 9781605667515
DOI: 10.4018/978-1-60566-750-8.ch011
Cite Chapter Cite Chapter

MLA

. "Transaction Level Model Automation for Multicore Systems." Behavioral Modeling for Embedded Systems and Technologies: Applications for Design and Implementation, edited by Luís Gomes and João M. Fernandes, IGI Global, 2010, pp. 271-289. https://doi.org/10.4018/978-1-60566-750-8.ch011

APA

. (2010). Transaction Level Model Automation for Multicore Systems. In L. Gomes & J. Fernandes (Eds.), Behavioral Modeling for Embedded Systems and Technologies: Applications for Design and Implementation (pp. 271-289). IGI Global. https://doi.org/10.4018/978-1-60566-750-8.ch011

Chicago

. "Transaction Level Model Automation for Multicore Systems." In Behavioral Modeling for Embedded Systems and Technologies: Applications for Design and Implementation, edited by Luís Gomes and João M. Fernandes, 271-289. Hershey, PA: IGI Global, 2010. https://doi.org/10.4018/978-1-60566-750-8.ch011

Export Reference

Mendeley
Favorite

Abstract

Model based verification has been the bedrock of electronic design automation. Over the past several years, system modeling has evolved to keep up with improvements in process technology fueled by Moore’s law. Modeling has evolved to keep up with the complexity of applications resulting in various levels of abstractions. The design automation industry has evolved from transistor level modeling to gate level and eventually to register transfer level (RTL). These models have been used for simulation based verification, formal verification and semiformal verification. With the advent of multicore systems, RTL modeling and verification are no longer feasible. Furthermore, the software content in most modern designs is growing rapidly. The increasing software content, along with the size, complexity and heterogeneity of multicore systems, makes RTL simulation extremely slow for any reasonably sized system. This has made system verification the most serious obstacle to time to market. The root of the problem is the signal-based communication modeling in RTL. In any large design there are hundreds of signals that change their values frequently during the execution of the RTL model. Every signal toggle causes the simulator to stop and reevaluate the state of the system. Therefore, RTL simulation becomes painfully slow. To overcome this problem, designers are increasingly resorting to modeling such complex systems at higher levels of abstraction than RTL. Transaction level models (TLMs) have emerged as the next level of abstraction for system design. However, well defined TLM semantics are needed for design automation at the transaction level. In this chapter, we present transaction level model automation for multicore systems based on well defined TLM semantics. TLMs replace the traditional signal toggling model of system communication with function calls, thereby increasing simulation speed. TLMs are already being used for executable specification of multicore designs, for analysis, fast simulation, and debugging. They play an important role in early application development and debugging before the final prototype has been implemented. We discuss essential issues in TLM automation and also provide an understanding of the basic building blocks of TLMs.

Request Access

You do not own this content. Please login to recommend this title to your institution's librarian or purchase it from the IGI Global bookstore.