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Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints

Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints

Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
Copyright: © 2011 |Pages: 29
ISBN13: 9781609602123|ISBN10: 1609602129|EISBN13: 9781609602147
DOI: 10.4018/978-1-60960-212-3.ch002
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MLA

Izosimov, Viacheslav, et al. "Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints." Design and Test Technology for Dependable Systems-on-Chip, edited by Raimund Ubar, et al., IGI Global, 2011, pp. 37-65. https://doi.org/10.4018/978-1-60960-212-3.ch002

APA

Izosimov, V., Pop, P., Eles, P., & Peng, Z. (2011). Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints. In R. Ubar, J. Raik, & H. Vierhaus (Eds.), Design and Test Technology for Dependable Systems-on-Chip (pp. 37-65). IGI Global. https://doi.org/10.4018/978-1-60960-212-3.ch002

Chicago

Izosimov, Viacheslav, et al. "Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints." In Design and Test Technology for Dependable Systems-on-Chip, edited by Raimund Ubar, Jaan Raik, and Heinrich Theodor Vierhaus, 37-65. Hershey, PA: IGI Global, 2011. https://doi.org/10.4018/978-1-60960-212-3.ch002

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Abstract

The authors also present evaluation of the schedule synthesis heuristics with and without preemption using extensive experiments and a real-life example.

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