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A Biomimetic Adaptive Algorithm and Micropower Circuit Architecture for Implantable Neural Decoders

A Biomimetic Adaptive Algorithm and Micropower Circuit Architecture for Implantable Neural Decoders

Benjamin I. Rapoport, Rahul Sarpeshkar
Copyright: © 2011 |Pages: 39
ISBN13: 9781609605612|ISBN10: 1609605616|EISBN13: 9781609605629
DOI: 10.4018/978-1-60960-561-2.ch223
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MLA

Rapoport, Benjamin I., and Rahul Sarpeshkar. "A Biomimetic Adaptive Algorithm and Micropower Circuit Architecture for Implantable Neural Decoders." Clinical Technologies: Concepts, Methodologies, Tools and Applications, edited by Information Resources Management Association, IGI Global, 2011, pp. 581-619. https://doi.org/10.4018/978-1-60960-561-2.ch223

APA

Rapoport, B. I. & Sarpeshkar, R. (2011). A Biomimetic Adaptive Algorithm and Micropower Circuit Architecture for Implantable Neural Decoders. In I. Management Association (Ed.), Clinical Technologies: Concepts, Methodologies, Tools and Applications (pp. 581-619). IGI Global. https://doi.org/10.4018/978-1-60960-561-2.ch223

Chicago

Rapoport, Benjamin I., and Rahul Sarpeshkar. "A Biomimetic Adaptive Algorithm and Micropower Circuit Architecture for Implantable Neural Decoders." In Clinical Technologies: Concepts, Methodologies, Tools and Applications, edited by Information Resources Management Association, 581-619. Hershey, PA: IGI Global, 2011. https://doi.org/10.4018/978-1-60960-561-2.ch223

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Abstract

Algorithmically and energetically efficient computational architectures that operate in real time are essential for clinically useful neural prosthetic devices. Such architectures decode raw neural data to obtain direct motor control signals for external devices. They can also perform data compression and vastly reduce the bandwidth and consequently power expended in wireless transmission of raw data from implantable brain–machine interfaces. We describe a biomimetic algorithm and micropower analog circuit architecture for decoding neural cell ensemble signals. The decoding algorithm implements a continuous-time artificial neural network, using a bank of adaptive linear filters with kernels that emulate synaptic dynamics. The filters transform neural signal inputs into control-parameter outputs, and can be tuned automatically in an on-line learning process. We demonstrate that the algorithm is suitable for decoding both local field potentials and mean spike rates. We also provide experimental validation of our system, decoding discrete reaching decisions from neuronal activity in the macaque parietal cortex, and decoding continuous head direction trajectories from cell ensemble activity in the rat thalamus. We further describe a method of mapping the algorithm to a highly parallel circuit architecture capable of continuous learning and real-time operation. Circuit simulations of a subthreshold analog CMOS instantiation of the architecture reveal that its performance is comparable to the predicted performance of our decoding algorithm for a system decoding three control parameters from 100 neural input channels at microwatt levels of power consumption. While the algorithm and decoding architecture are suitable for analog or digital implementation, we indicate how a micropower analog system trades some algorithmic programmability for reductions in power and area consumption that could facilitate implantation of a neural decoder within the brain. We also indicate how our system can compress neural data more than 100,000-fold, greatly reducing the power needed for wireless telemetry of neural data.

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