Welcome to the InfoSci Platform
Low-Complexity Stereo Matching and Viewpoint Interpolation in Embedded Consumer Applications

Low-Complexity Stereo Matching and Viewpoint Interpolation in Embedded Consumer Applications

Lu Zhang, Ke Zhang, Jiangbo Lu, Tian-Sheuan Chang, Gauthier Lafruit
Copyright: © 2012 |Pages: 24
ISBN13: 9781613503263|ISBN10: 1613503261|EISBN13: 9781613503270
DOI: 10.4018/978-1-61350-326-3.ch016
Cite Chapter Cite Chapter

MLA

Zhang, Lu, et al. "Low-Complexity Stereo Matching and Viewpoint Interpolation in Embedded Consumer Applications." Depth Map and 3D Imaging Applications: Algorithms and Technologies, edited by Aamir Saeed Malik, et al., IGI Global, 2012, pp. 307-330. https://doi.org/10.4018/978-1-61350-326-3.ch016

APA

Zhang, L., Zhang, K., Lu, J., Chang, T., & Lafruit, G. (2012). Low-Complexity Stereo Matching and Viewpoint Interpolation in Embedded Consumer Applications. In A. Malik, T. Choi, & H. Nisar (Eds.), Depth Map and 3D Imaging Applications: Algorithms and Technologies (pp. 307-330). IGI Global. https://doi.org/10.4018/978-1-61350-326-3.ch016

Chicago

Zhang, Lu, et al. "Low-Complexity Stereo Matching and Viewpoint Interpolation in Embedded Consumer Applications." In Depth Map and 3D Imaging Applications: Algorithms and Technologies, edited by Aamir Saeed Malik, Tae Sun Choi, and Humaira Nisar, 307-330. Hershey, PA: IGI Global, 2012. https://doi.org/10.4018/978-1-61350-326-3.ch016

Export Reference

Mendeley
Favorite

Abstract

Viewpoint interpolation is the process of synthesizing plausible in-between views - so-called virtual camera views - from a couple of surrounding fixed camera views. To make viewpoint interpolation possible for low/moderate-power consumer applications, a further quality/complexity trade-off study is required to conciliate algorithmic quality to architectural performance. In essence, the inter-dependencies between the different algorithmic steps in the processing chain are thoroughly analyzed, aiming at an overall quality-performance model that pinpoints which algorithmic functionalities can be simplified with minor global input-output quality degradation, while maximally reducing their implementation complexity w.r.t. arithmetic and line buffer requirements. Compared to state-of-the-art CPU and GPU platforms running at several GHz clock speed, our low-power 100 MHz FPGA implementation achieves speedups with one to two orders of magnitude, without impeding on the visual quality, reaching over 100 frames per second VGA high-quality, 64-disparity search range stereo matching and enabling viewpoint interpolation in low-power, embedded applications.

Request Access

You do not own this content. Please login to recommend this title to your institution's librarian or purchase it from the IGI Global bookstore.