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Performance Analysis of Temperature Management Approaches in Networks-on-Chip

Performance Analysis of Temperature Management Approaches in Networks-on-Chip

Tim Wegner, Martin Gag, Dirk Timmermann
Copyright: © 2012 |Volume: 3 |Issue: 4 |Pages: 23
ISSN: 1947-3176|EISSN: 1947-3184|EISBN13: 9781466612020|DOI: 10.4018/jertcs.2012100102
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MLA

Wegner, Tim, et al. "Performance Analysis of Temperature Management Approaches in Networks-on-Chip." IJERTCS vol.3, no.4 2012: pp.19-41. http://doi.org/10.4018/jertcs.2012100102

APA

Wegner, T., Gag, M., & Timmermann, D. (2012). Performance Analysis of Temperature Management Approaches in Networks-on-Chip. International Journal of Embedded and Real-Time Communication Systems (IJERTCS), 3(4), 19-41. http://doi.org/10.4018/jertcs.2012100102

Chicago

Wegner, Tim, Martin Gag, and Dirk Timmermann. "Performance Analysis of Temperature Management Approaches in Networks-on-Chip," International Journal of Embedded and Real-Time Communication Systems (IJERTCS) 3, no.4: 19-41. http://doi.org/10.4018/jertcs.2012100102

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Abstract

With the progress of deep submicron technology, power consumption and temperature related issues have become dominant factors for chip design. Therefore, very large-scale integrated systems like Systems-on-Chip (SoCs) are exposed to an increasing thermal stress. On the one hand, this necessitates effective mechanisms for thermal management. On the other hand, application of thermal management is accompanied by disturbance of system integrity and degradation of system performance. In this paper the authors propose to precompute and proactively manage on-chip temperature of systems based on Networks-on-Chip (NoCs). Thereby, traditional reactive approaches, utilizing the NoC infrastructure to perform thermal management, can be replaced. This results not only in shorter response times for application of management measures and a reduction of temperature and thermal imbalances, but also in less impairment of system integrity and performance. The systematic analysis of simulations conducted for NoC sizes ranging from 2x2 to 4x4 proves that under certain conditions the proactive approach is able to mitigate the negative impact of thermal management on system performance while still improving the on-chip temperature profile.

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