Accelerated Network Traversal Using Multi/Many-Cores

Accelerated Network Traversal Using Multi/Many-Cores

DOI: 10.4018/978-1-5225-3799-1.ch003

Abstract

New BSP platforms like TOTEM are following a similar approach to Big Data industry-proven frameworks but applied to exploit the potential of HPC heterogeneous nodes that combine multi-cores and GPUs. The performance of platforms under this new paradigm depends on minimizing the computation time of partitions by increasing the suitability of partitions to processors. However, there is a lack of studies on the suitability of parallel architectures for processing different families of graphs, including small-world and scale-free networks. In this chapter, the authors show how to characterize the performance of multi/many-cores when traversing synthetic networks of varying topology in order to reveal the suitability of multi-cores and GPUs for processing different families of graphs.
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Multi-Core Cpu Vs Graphics Processor Unit

The semiconductor industry has diverged into two separated paths: the multi-core and the many-core approaches (Wen-mei et al., 2008). CPU and GPU design philosophies are contrasting: CPUs integrate a few full-featured cores and advanced control logic, whereas GPUs are powered by many small cores in order to achieve higher throughputs.

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