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Top1. Introduction
Remote sensing satellite missions consist of captured images using satellite sensor technologies to detect and classify objects on earth (Fu et al., 2020; Semlali & Chaker, 2019). These data can be used in a variety of areas, including agriculture, climatology, ecology, defense, and others. Therefore, for the transmission of this information from either the spacecraft to the ground station or from the opposite direction, this last should be: i) secured against illegal access, ii) protected against unwanted modifications, and iii) accessible to an approved entity when needed (El Makhloufi et al., 2020a, 2020b; Wang et al., 2019).
Both the uplink and the downlink must be protected to secure data transmission from the satellite to the ground station. In addition, for the protection of satellite communication links, all security services such as integrity, authentication must be used for securing terrestrial architectures. To prevent unauthorized users from taking over the satellite, the integrity and authentication of the uplink or remote channel must be verified (Isoaho et al., 2010).
The space environment has an impact on satellite hardware and proper precautions on satellite material and equipment selection reduce the impact of such threats (Quinn, 2017). Therefore, in this research paper, the authors concentrate on applying security to remote sensing algorithms with the use of proper equipment on their implementation.
In recent years, cryptographic algorithms are widespread to combat security threats (Zodpe & Sapkal, 2020). Secure embedded systems are of enormous importance today (Manjith & Ramasubramanian, 2020; Abbes et al., 2013). Various kinds of solutions, from area-sensitive on-board devices to highly parallel fast processing systems, require secure data transmission and storage. These various areas/performance criteria prompted us to investigate various AES implementation techniques.
Many organizations around the world have adopted the Rijndael algorithm, which was accepted under name of AES by the US National Institute of Standards and Technology (NIST) (Daemen & Rijmen, 1998). AES is widely used for its flexibility, simplicity, and ease of implementation. It is applied for a variety of purposes, whether in software or hardware. Hardware implementation provides faster speed, greater protection, and lower power consumption, making it a more appealing option than a software implementation, which is more vulnerable to outside attacks.
Field Programmable Gate Arrays (FPGAs) have the advantage to be defined by the End User and do not require the fabrication process. In addition, FPGAs include different resources (parallelism, on-chip memory, etc.) which results in becoming a workable goal for the development of various programs in various disciplines. As a result, robust cryptography, such as the Advanced Encryption Algorithm (Borkar et al., 2011) and its development on FPGAs (Farooq & Aslam, 2017), would help in reducing and protecting data from attacks and radiation damage.
In order to implement AES in hardware, FPGAs are an attractive choice for the proposed secure Land Surface Temperature-Split Window (LST-SW). In fact, LST-SW is a famous algorithm in remote sensing for the estimation of the temperature of the earth (Sobrino & Raissouni, 2000). Moreover, the LST-SW algorithm is an essential factor involving surface energy and water balance in different temporal and spatial scales.
The space environment causes several threats that can affect the proper functioning of satellites. Radiation represents a hostile environment for satellites and therefore all electronic systems used on-board, including encryption electronics, are susceptible to radiation-induced faults. The influence of this space radiation on the electronics on-board satellites has always been primary attention to the space industry. The influence of space radiation to the electronic components may be classified into two broad types: a) Total Ionizing Dose (TID) (Goiffon et al., 2018), and b) Single Event Upset (SEU) (Legat et al., 2011). These effects cause fault error bits during the transmission of data. Therefore, special measures should be taken to protect on-board encryption processors from faults.