Open Source Digital Camera on Field Programmable Gate Arrays

Open Source Digital Camera on Field Programmable Gate Arrays

Cristinel Ababei (Marquette University, Department of Electrical and Computer Engineering, WI, USA), Shaun Duerr (Marquette University, Department of Electrical and Computer Engineering, WI, USA), William Joseph Ebel Jr. (Marquette University, Department of Electrical and Computer Engineering, WI, USA), Russell Marineau (Marquette University, Department of Electrical and Computer Engineering, WI, USA), Milad Ghorbani Moghaddam (Marquette University, Department of Electrical and Computer Engineering, WI, USA) and Tanzania Sewell (Marquette University, Department of Electrical and Computer Engineering, WI, USA)
Copyright: © 2016 |Pages: 11
DOI: 10.4018/IJHCR.2016100103

Abstract

We present an open source digital camera implemented on a field programmable gate array (FPGA). The camera functionality is completely described in VHDL and tested on the DE2-115 educational FPGA board. Some of the current features of the camera include video mode at 30 fps, storage of taken snapshots into SDRAM memories, and grayscale and edge detection filters. The main contributions of this project include 1) the actual system level design of the camera, tested and verified on an actual FPGA chip, and 2) the public release of the entire implementation including source code and documentation. While the proposed camera is far from being able to compete with commercial offerings, it can serve as a framework to test new research ideas related to digital camera systems, image processing, computer vision, etc., as well as an educational platform for advanced digital design with VHDL and FPGAs. As examples of that, we report two spin-off projects developed on top of or starting from the presented digital camera system.
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Baremetal Digital Camera System

In this section, we present the proposed baremetal digital camera system. We discuss some of the design decisions and the main features.

Block Diagram

The simplified block diagram of the proposed baremetal digital camera system on FPGA is shown in Figure 1. The main functionality of the camera includes video mode at 30 fps, the ability to take a snapshot and store it on the SDRAM memory or on the SD Card, the ability to fetch a snapshot from the SDRAM or SD Card and display it on the VGA display, grayscale filtering, and edge detection based on Sobel operator.

Figure 1.

Block diagram of the proposed baremetal digital camera system

IJHCR.2016100103.f01

Next, we present details about each of the main features shown in the block diagram in Figure 1.

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