Design of a Simple and Low-Cost Calculator in the Laboratory Using FPGA

Design of a Simple and Low-Cost Calculator in the Laboratory Using FPGA

Debapriya Mukherjee, Kaustav Das, Arpita Das
Copyright: © 2021 |Pages: 19
DOI: 10.4018/978-1-7998-3479-3.ch021
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This chapter shows the design guideline of a simple calculator in the laboratory using FPGA board. Since FPGA prototyping is a promising and also challenging alternative for low cost hardware design, the authors have attempted to design some fundamental arithmetic and logical operations using FPGA. Hence, this is also the core of any multiprocessor design. Proposed architecture of the calculator is able to compute any of four basic arithmetic operations such as addition, subtraction, multiplication, division, and some logical operations as specified by the user and the output results are displayed dynamically on the LCD screen of the FPGA board. This architecture may be upgraded for more versatile use such as computation of scientific operations by adding few other sub-modules. Present design of calculator follows very simple algorithm and hardware resource requirement is also minimal. Hence, it can be successfully verified in any laboratory by using even low-level starter FPGA kit.
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It is a common practice to realize specific operations/algorithms in embedded systems using programmable general-purpose processors. However, an alternative solution to software implementation is the design of application specific dedicated hardware in order to achieve high performance system at relatively low cost. The advancement in VLSI technology makes it attractive for implementation in any application specific task to minimize the size and power requirements which in turn reduce the cost.

In this view, we aim to design a prototype of a simple, low cost calculator in the laboratory which would enable us to perform the basic arithmetic operations like addition, subtraction, multiplication, division along with some logical operations. Though a great amount of work had been done on Arithmetic and Logic Unit (ALU) design (O-Cisneros et al. 2005; William 2006; Xiao et al. 2008; Oztekin et al. 2011; Singh 2014), it is still a challenging task to implement the algorithms successfully in hardware. FPGAs are matrix of configurable logic blocks connected by programmable interconnects and are used to implement desired functionality after manufacturing (Brown et al. 1992; Rose et al. 1993). Due to the programmable nature of FPGAs, they are used in many application fields, such as ASIC prototyping, wireless communications, video/image processing, surveillance, industrial automation, information appliances, home networking & monitoring, residential set top boxes etc. Beside the promising computational platform of FPGAs, parallel nature of computing and overall non recurring costs make them significantly faster for some applications (Rose et al. 1993; Oldfield & Dorf 1995).

The objective of this work is to design an alternative, simple, low power, cost effective calculator in the laboratory. FPGA prototyping of this reusable, dynamic calculator is a reliable way to verify the design in hardware (Lysaght 1993; Oldfield & Dorf 1995; Kalte et al, 2002). Initial step of design is to frame out the simple arithmetic and logical operations and then it would be upgraded for scientific calculations (inclusion of trigonometric operations and logarithmic calculations). In this work, design guideline of simple arithmetic circuits such as adders, subtractors, multiplier, divider and some logical units are studied and assembled to configure the dynamic calculator. The inputs may be applied either by using switches in the FPGA board or a conventional PS/2 keyboard that is connected externally but interfaced to FPGA and the results are displayed on the (2 × 16) paneled LCD screen available on the FPGA board. The design algorithm of this operation is very simple and hardware resource requirement is also minimal. Hence any low-level FPGA hardware is sufficient to implement the design in the laboratory.

Key Terms in this Chapter

ASIC: Application-specific integrated circuit.

LCD: Liquid crystal display.

CPU: Central processing unit.

FPGA: Field programmable gate array.

ASCII Codes: American standard code for information interchange.

BCD Conversion: Binary coded decimal conversion.

MSB/LSB: Most significant bit/least significant bit.

VLSI: Very large-scale integration.

ROM: Read only memory.

I/O Block: Input/output block.

XOR Gates: Exclusive-OR gate.

RAM: Random access memory.

8×1 MUX: Multiplexer with 8 input data-line and single output terminal.

ALU: Arithmetic and logic unit.

VHDL: Very high-speed integrated circuit hardware description language.

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