Improving Cache Energy Efficiency for Green Computing

Improving Cache Energy Efficiency for Green Computing

Sparsh Mittal (Iowa State University, USA)
Copyright: © 2014 |Pages: 7
DOI: 10.4018/978-1-4666-5202-6.ch106
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Background

Cache power can be divided into two categories, namely the dynamic power, which is dissipated due to transistor switching and the leakage power, which is dissipated due to flow of leakage currents (Wang et al., 2013). In last level caches, leakage power forms a major source of power consumption and hence, we focus on the techniques used for saving cache leakage power.

In literature, several cache reconfiguration techniques have been used for saving cache energy. These techniques work on the principle that the cache requirements of different programs vary and hence, by allocating just the right amount of cache to an application, the rest of the cache can be turned off to save leakage energy. Thus, the cache reconfiguration based techniques change the active size of the cache to save energy.

The circuit-level leakage control schemes can be broadly divided into two categories, namely state-preserving and state-destroying schemes. These schemes enable switching the cache block to low-power mode. The difference between them lies in the fact that the state-preserving techniques retain the state of the cache block in the low-power mode (Flautner et al., 2001), while the state-destroying techniques do not maintain the contents of the block in the low-power mode (Powell et al., 2000).

Using these circuit-level schemes, several architectural techniques save cache energy. These techniques turn-off the cache at different granularity, such as cache-sets (called selective-sets Yang et al., 2001), cache-ways (called selective-ways, Sundararajan et al., 2012), hybrid (combination of selective-sets and selective-ways Mittal et al., 2012), cache blocks (Kaxiras et al., 2001, Flautner et al., 2001) and cache colors (Mittal et al., 2013).

Key Terms in this Chapter

Selective-Sets Approach: This approach changes the number of active sets to save energy.

Static Reconfiguration: Static reconfiguration refers to the case where the suitable cache configuration is decided through offline profiling and is fixed at the beginning of the simulation. Thus, during the simulation, cache configuration is not altered.

Cache Leakage Energy: This refers to the energy which is dissipated due to leakage currents that flow even when the cache is not accessed. It is also called static energy.

Cache Dynamic Energy: This refers to the energy which is dissipated whenever transistors switch to change the voltage in a particular cell.

State-Preserving Leakage Control: This scheme switches a cache block into low-energy mode where the contents of the block are preserved. By again bringing the cache into normal mode, the contents can be accessed.

Dynamic Profiling: In this scheme, profiling information is only achieved at runtime and not beforehand.

Cache Reconfiguration: This refers to changing the active (used) portion of the cache with the objective of saving energy.

Dynamic Reconfiguration: In dynamic reconfiguration, the cache configuration is changed at runtime.

Selective-Ways Approach: This approach changes the number of active ways to save energy.

Cache Coloring: This scheme divides the cache into several non-overlapping bins. The mapping of physical addresses to cache color can be controlled by software to perform cache reconfiguration.

Last Level Cache: Modern processors use multi-level caches, where the caches closest to the processor are smallest and fastest. Last level caches refer to the caches which are farthest to the processor.

Static Profiling: Before actually running the program, running the program to collect profiling information is referred to as static or offline profiling.

State-Destroying Leakage Control: This scheme switches a cache block into low-energy mode where the contents of the block are destroyed.

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