Stochastic computing utilizes random bit streams to encode continuous data efficiently. One important aspect is the stochastic number generator (SNG) that encodes numbers into random binary bit streams. This work presents power-efficient 4-bit and 8-bit SNGs by using a modified Non-linear Feedback Shift Register (NLFSR) as the random number source and a Weighted Binary Generator (WBG) as the probability conversion circuit. A bipartite approach is employed to reduce power and delay consumption in the SNGs. Additionally, the concept of sharing a single random number source with multiple probability conversion circuits is explored to achieve further power savings. This project offers enhanced power efficiency in SNGs, contributing to advancements in stochastic computing and power circuit designs. The main application of this project is encryption, as random number sequences are required for various stages of encryption protocols.
Top1. Introduction
Computation refers to the execution of well-defined procedures and structures to perform arithmetic or non-arithmetic calculations. It encompasses a broad range of mathematical and logical operations within a defined framework. Deterministic binary computing and arithmetic computing are prominent forms of computation. Computational applications extend to various domains, including digital filters and image processing, illustrating the diverse practical implementations of computation (Alaghi & Hayes, 2013; Hayes, 2015; Ichihara et al., 2019). These applications necessitate sophisticated hardware. The hardware complexity cannot be decreased using deterministic binary computing. Stochastic computing is utilized to obtain great fault tolerance without a hardware overhead.
In the 1960s, stochastic computing (SC) was presented as a technique to accomplish complicated computer tasks on low-cost hardware (Gaines, 1967). SC has made a name for itself as a novel way to do calculations with logic circuits. SC circuits are specifically engineered to handle arbitrary sequences of bits, departing from the conventional paradigm of working with predictable binary numbers for computational tasks (Joshi, 2021). These circuits rely on bit streams to represent both input and output data, employing a unique encoding mechanism that assigns probabilities to the occurrence of 1s within these streams. This innovative approach, known as stochastic computing, encompasses a collection of algorithms that harness the power of random bit sequences to accurately represent and process continuous quantities (Lyshevski et al., 2008; Salehi, 2020). By adopting this methodology, SC circuits open up new possibilities for efficient and robust computation in various domains.
Stochastic computing involves encoding numbers into random binary bit streams through the use of a stochastic number generator (SNG) (Mohajer et al., 2021). This approach offers high error tolerance, making it particularly valuable for applying random data to circuits, especially in fields like Image Processing and Digital Filters (Li & Lilja, 2011; Li et al., 2014; Yuan & Wang, 2016). However, these applications often require large and complex circuits with numerous random inputs, such as SNGs, which can lead to substantial area overhead.
To address this challenge, a sharing mechanism is employed to reduce the circuit’s space requirements. This involves sharing a single random number source (RNS) with multiple prob- ability conversion circuits (PCCs) (Schober et al., 2022), which play crucial roles in the SNG. While this method optimizes space, it comes with an increased correlation between the outputs of the PCCs, termed Stochastic Computing Correlation (SCC) (Lee et al., 2018; Lee et al., 2022; Liu et al., 2021).
SCC quantifies the level of similarity between the output bit streams of the PCCs, ranging from -1 to 1. An SCC value of 0 indicates no correlation, which is the desired outcome. When comparing corresponding bits of the output streams, a positive SCC suggests that most 1s and 0s align, while a negative SCC indicates complemented bits in the majority of comparable positions (Jeavons et al., 1994; Qian et al., 2011).
Designs that produce bit streams with low SCC values are preferred since lower absolute SCC values result in more accurate outcomes in stochastic computing circuits. By focusing on reducing SCC, researchers can enhance the performance and reliability of these systems without the need for excessive SNGs and their associated area overhead (Ting & Hayes, 2014; Yang et al., 2018).