On the Reliability of Post-CMOS and SET systems

On the Reliability of Post-CMOS and SET systems

Milos Stanisavljevic (Swiss Federal Institute of Technology EPFL, Switzerland), Alexandre Schmid (Swiss Federal Institute of Technology EPFL, Switzerland) and Yusuf Leblebici (Swiss Federal Institute of Technology EPFL, Switzerland)
DOI: 10.4018/978-1-60960-186-7.ch007
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The necessity of applying fault-tolerant techniques to increase the reliability of future nano-electronic systems is an undisputed fact, dictated by the high density of faults that will plague the chips. The averaging and thresholding fault-tolerant technique that has proven remarkable efficiency in CMOS is presented for SET-based designs. Computer simulations demonstrate the superiority of this fault-tolerant technique over other methods, which is specifically the case when an adaptable threshold is used.
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Reliability And Yield In Post-Cmos Fabrication Technologies

Some typical physical defects in VLSI chips include:

  • Process defects – missing contact windows, parasitic transistors, oxide breakdown, etc.

  • Material defects – bulk defects (cracks, crystal imperfections), surface impurities, etc.

  • Aging defects – dielectric breakdown, electromigration, etc.

Errors are traditionally categorized into three main groups: permanent, intermittent and transient errors according to their stability and concurrence. Permanent errors are irreversible physical changes in a chip. The most common sources for this kind of errors are the manufacturing processes. Permanent errors also occur during usage lifetime of the circuit, especially when the circuit is old and therefore wears out. Intermittent errors are occasional error bursts that usually repeat themselves every now and then, i.e. are not continuous as permanent errors. These errors are caused by unstable or marginal hardware, and are activated by environmental changes such as temperature or supply voltage change. Transient errors are temporal single malfunctions caused by temporary environmental conditions which can be external phenomenon such as radiation or noise originating from the other parts of the chip.

Sources of errors can be classified according to the phenomenon causing the error. Such origins are for instance: the manufacturing process, physical changes during operation, internal noise caused by other parts of the circuit and external noise originating from the chip environment.

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