A Congestion Controlled and Load Balanced Selection Strategy for Networks on Chip

A Congestion Controlled and Load Balanced Selection Strategy for Networks on Chip

Ashima Arora, Neeraj Kumar Shukla
Copyright: © 2020 |Pages: 14
DOI: 10.4018/IJDST.2020010101
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Abstract

For an on-chip router, the suitability of a particular routing algorithm relies on its selection of the best possible output paths. For representing congestion, the selection function of a routing algorithm uses an appropriate metric. The preferred selection metric will thus help in deciding the congested free path for any incoming flit. In this article, the fuzzy-based selection function is designed by using a cumulative flit count as a global metric of traffic estimation. The strategy provides an added advantage of effectively utilizing the links and thus regulates the traffic flow by keeping track of buffer usage and flits flow history simultaneously. The experimental results obtained under different traffic conditions, shows the proposed scheme outperforms other traditional, fuzzy based schemes in terms of both performance and power requirements.
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Introduction

Increasing the computational performance of Intellectual property cores has been preferred research on current developments of multi-core systems on chip (MPSoC). With comparable wire delays and gate delays due to technology scaling, it also demands a strong and proficient communication among the cores. Traditional methods of communication like bus-based interconnection in multiprocessor systems faced many constrained in terms of poor scalability, inefficient utilization, reserved bandwidth, more delays, and power consumption. These issues are resolved by including the theories of networking with communication that has introduced the concept of the Network on chip (NOC). The NOC is the embedded communication network that connects different IP cores in SoCs. The Adaptivity and sustainability of NOCs have reduced the design time of new SOC based production. The competency of NOC is governed by its underlying communication framework, which in turn depends on its basic constituent router. For a system on a chip, many routers are interconnected to communicate information among various IP cores.

The performance of any router will depend on factors like topology, routing algorithm, and flow control. Topology is the way the routers are interconnected in a network. The two-dimensional mesh topology is generally preferred in order to adapt to short link length and aid fabrication practice. In this topology, the IP cores are arranged as a rectangular tile with each core connected to a local router which in turn connected with other similar routers in the mesh network form. The router of a mesh topology has five bidirectional ports, four corresponding to each direction (North, East, West, South) and one connected to the local IP core for transmission of data. For communication, considering the area and power constraints, the most preferred switching technique is wormhole switching, in which each information packet is divided into flits. The flit is the small flow control units which commute from all input ports arbitrates amidst themselves and final flit is transferred to one of the output port through a crossbar switch.

The routing algorithm will determine the output port for any incoming flit. For an on-chip network, there are three types of routing algorithm, namely oblivious, deterministic and adaptive. Despite being a complex implementation, adaptive algorithms are preferred due to its better performance than oblivious algorithm under nonuniform traffic conditions.

Many parameters like latency, dead-lock, and live-lock free conditions, load distribution mechanisms, etc. govern the optimum performance of the routing algorithm. One such factor is the capability to handle packets flow at higher injection rates, the inadequacy of which may lead to congestion. Congestion occurs when nodes generate more traffic than the network capacity and it may lead to increased latency and severe throughput drop. Therefore, congestion should be controlled before the network gets saturated. Much research has been done in this area of congestion control for on-chip networks (Thottethodi, Lebeck, & Mukherjee, 2004; Baydal, Lopez, & Duato, 2005; Baydal & López, 2003; Gu, Wang, Ke, Wang, & Kang, 2007). Metrics such as available buffer slots, collisions, waiting time, bandwidth, power consumptions, etc. are used to represent congestion. These metrics can be used to measure congestion on both the local as well as global path. Two or more of these metrics when considered collectively, can give a better mechanism for congestion control. However, the relation between these constraints involves complexity. Due to which, heuristic methods based models like fuzzy logic should be considered for congestion representation.

Thus, the objective of this article is to provide a routing algorithm that designs a selection strategy based on the fuzzy controller. The strategy measures congestion on local as well as on a global path simultaneously. Considering congestion information on both paths will combine their individual advantages and overcome their respective disadvantages. Besides modeling the relationship in the form of easy If-Then rules, the fuzzy design also eliminates any vagueness in the measurement of congestion on the output path. The remaining part of the paper is summarized as: Section 2 gives an outline of related work. Section 3 presents the importance and the algorithm of the proposed work. In Section 4 the proposed selection strategy has been described by implementing the concept of fuzzy logic. Section 5 validates the performance and improvements of the proposed selection approach. Finally, Section 6 concludes the proposed work.

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