Cognitive Radio Programming Survey

Cognitive Radio Programming Survey

Mickaël Dardaillon, Kevin Marquet, Tanguy Risset, Jérôme Martin, Henri-Pierre Charles
DOI: 10.4018/978-1-4666-6571-2.ch025
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Cognitive radio is based on Software Defined Radio (SDR) technology. The commercial success of smart radio applications and cognitive radio networks will be very dependent on cost, performance, and power consumption of SDR hardware platforms. SDR hardware is now available, but many issues have yet to be studied. In this chapter, the authors detail the constraints imposed by recent radio protocols and how hardware architectures support them. Then, they present existing architectures and solutions for SDR programming. Finally, the authors mention challenges related to the programming of future cognitive radio systems.
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Until now, radio technologies have been developed in a static paradigm: protocols, radio resources allocation and access network architectures were defined beforehand, allowing implementation of effective yet non-adaptable radio systems. Nowadays, the saturation of radio frequency bands calls for a new era of radio systems that will be characterized by self-adaptive mechanisms. These mechanisms will rely on software radio technologies.

J. Mitola has coined the concept of software radio in his seminal work during the early 90’s (Mitola, 1992). While implementing the whole radio in software is still a utopia, many architectures now hitting the market include some degree of programmability.

With the emergence of SDR, many questions related to the software layer of a software radio machine arise. How will this kind of platform be programmed? How can we write radio transceiver programs that are portable from one terminal to another? To answer these questions, programmers have to know how the architectural characteristics of SDR systems can be abstracted to provide portable code. Unfortunately, there is no agreement on the hardware architecture embedded in a cellular phone with SDR facilities. Various technologies are used: Application Specific Integrated Circuit (ASIC), Field Programmable Gate Array (FPGA), Digital Signal Processor (DSP), General Purpose Processor (GPP), etc. These technologies are often mixed together and sometimes the term configurable is more adequate than programmable for them.

Studying architectures, programming environments and programming models for emerging SDR systems simultaneously is of crucial importance because of the need to define the hardware abstraction layer of SDR systems: the radio hardware abstraction layer (R-HAL).

In this chapter, we provide an up-to-date review of existing SDR hardware platforms, classifying them into five categories. Programming models and programming tools used in these platforms are not yet mature, most of these platforms being currently programmed using ad-hoc techniques. No common language, format or API has yet emerged; hence it is impossible to compare precisely the performance of the different approaches. All performance results presented here are taken from the existing works.

We illustrate, with LTE as an example, the problems of modern digital physical layer protocols: fast terminal reconfiguration, data-dependent data flow. We also give an insight on what should be used as programming model for the programming of SDR platforms.

The rest of the chapter is organized as follows: we first provide a brief summary of radio, SDR and cognitive radio technologies, we also present an example extracted from the LTE protocol that illustrates the difficulties of SDR programming. Next, we present a survey of hardware SDR platforms, categorize and provide synthetic performance comparisons between them including power consumption when available. We then focus on programming environments for SDR and more precisely on the problem of defining a language for describing waveforms, i.e. the radio’s physical layer. We finally review the remaining most important open problem: defining a programming model for SDR and a hardware abstraction layer for SDR.

Key Terms in this Chapter

Hardware Abstraction Layer: Software routines that abstract platform-specific details, giving programs direct access to hardware resources.

Cognitive Radio: Wireless communication system that can sense the air and decide to configure itself in a given mode.

Field Programmable Gate Array (FPGA): Integrated circuit designed to be configured after manufacturing, using a hardware description language.

Digital Signal Processor (DSP): Specialized microprocessor with an architecture optimized for the operational needs of digital signal processing.

Dataflow: Model of computation in which a program is represented as a graph, nodes represent operations and edges data communications.

Software Defined Radio (SDR): Radio system where parts of the signal processing are done in software.

Programming Model: Fundamental style of computer programming, a way of building the structure and elements of computer programs.

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